linux-imx
Public
Source
committed 2baa891e42dMTRR (Memory Type Range Register) controlRichard Gooch <rgooch@atnf.csiro.au> - 3 Jun 1999Luis R. Rodriguez <mcgrof@do-not-panic.com> - April 9, 2015===============================================================================Phasing out MTRR useMTRR use is replaced on modern x86 hardware with PAT. Direct MTRR use bydrivers on Linux is now completely phased out, device drivers should usearch_phys_wc_add() in combination with ioremap_wc() to make MTRR effective onnon-PAT systems while a no-op but equally effective on PAT enabled systems.Even if Linux does not use MTRRs directly, some x86 platform firmware may stillset up MTRRs early before booting the OS. They do this as some platformfirmware may still have implemented access to MTRRs which would be controlledand handled by the platform firmware directly. An example of platform use ofMTRRs is through the use of SMI handlers, one case could be for fan control,the platform code would need uncachable access to some of its fan controlregisters. Such platform access does not need any Operating System MTRR code inplace other than mtrr_type_lookup() to ensure any OS specific mapping requestsare aligned with platform MTRR setup. If MTRRs are only set up by the platformfirmware code though and the OS does not make any specific MTRR mappingrequests mtrr_type_lookup() should always return MTRR_TYPE_INVALID.For details refer to Documentation/x86/pat.txt.=============================================================================== On Intel P6 family processors (Pentium Pro, Pentium II and later) the Memory Type Range Registers (MTRRs) may be used to control processor access to memory ranges. This is most useful when you have a video (VGA) card on a PCI or AGP bus. Enabling write-combining allows bus write transfers to be combined into a larger transfer before bursting over the PCI/AGP bus. This can increase performance of image write operations 2.5 times or more. The Cyrix 6x86, 6x86MX and M II processors have Address Range Registers (ARRs) which provide a similar functionality to MTRRs. For these, the ARRs are used to emulate the MTRRs. The AMD K6-2 (stepping 8 and above) and K6-3 processors have two MTRRs. These are supported. The AMD Athlon family provide 8 Intel style MTRRs. The Centaur C6 (WinChip) has 8 MCRs, allowing write-combining. These are supported. The VIA Cyrix III and VIA C3 CPUs offer 8 Intel style MTRRs. The CONFIG_MTRR option creates a /proc/mtrr file which may be used to manipulate your MTRRs. Typically the X server should use this. This should have a reasonably generic interface so that similar control registers on other processors can be easily supported.There are two interfaces to /proc/mtrr: one is an ASCII interfacewhich allows you to read and write. The other is an ioctl()interface. The ASCII interface is meant for administration. Theioctl() interface is meant for C programs (i.e. the X server). Theinterfaces are described below, with sample commands and C code.