linux-imx

/*

 * Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.

 * Copyright (C) 2011 Google, Inc.

 *

 * Author:

 *  Jay Cheng <jacheng@nvidia.com>

 *  James Wylder <james.wylder@motorola.com>

 *  Benoit Goby <benoit@android.com>

 *  Colin Cross <ccross@android.com>

 *  Hiroshi DOYU <hdoyu@nvidia.com>

 *

 * This software is licensed under the terms of the GNU General Public

 * License version 2, as published by the Free Software Foundation, and

 * may be copied, distributed, and modified under those terms.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 *

 */

​

#include <linux/err.h>

#include <linux/kernel.h>

#include <linux/module.h>

#include <linux/platform_device.h>

#include <linux/io.h>

#include <linux/of.h>

​

#include <soc/tegra/ahb.h>

​

#define DRV_NAME "tegra-ahb"

​

#define AHB_ARBITRATION_DISABLE     0x04

#define AHB_ARBITRATION_PRIORITY_CTRL   0x08

#define   AHB_PRIORITY_WEIGHT(x)    (((x) & 0x7) << 29)

#define   PRIORITY_SELECT_USB BIT(6)

#define   PRIORITY_SELECT_USB2 BIT(18)

#define   PRIORITY_SELECT_USB3 BIT(17)

​

#define AHB_GIZMO_AHB_MEM       0x10

#define   ENB_FAST_REARBITRATE BIT(2)

#define   DONT_SPLIT_AHB_WR     BIT(7)

​

#define AHB_GIZMO_APB_DMA       0x14

#define AHB_GIZMO_IDE           0x1c

#define AHB_GIZMO_USB           0x20

#define AHB_GIZMO_AHB_XBAR_BRIDGE   0x24

#define AHB_GIZMO_CPU_AHB_BRIDGE    0x28

#define AHB_GIZMO_COP_AHB_BRIDGE    0x2c

#define AHB_GIZMO_XBAR_APB_CTLR     0x30

#define AHB_GIZMO_VCP_AHB_BRIDGE    0x34

#define AHB_GIZMO_NAND          0x40

#define AHB_GIZMO_SDMMC4        0x48

#define AHB_GIZMO_XIO           0x4c

#define AHB_GIZMO_BSEV          0x64

#define AHB_GIZMO_BSEA          0x74

#define AHB_GIZMO_NOR           0x78

#define AHB_GIZMO_USB2          0x7c

#define AHB_GIZMO_USB3          0x80

#define   IMMEDIATE BIT(18)

​

#define AHB_GIZMO_SDMMC1        0x84

#define AHB_GIZMO_SDMMC2        0x88

#define AHB_GIZMO_SDMMC3        0x8c

#define AHB_MEM_PREFETCH_CFG_X      0xdc

#define AHB_ARBITRATION_XBAR_CTRL   0xe0

#define AHB_MEM_PREFETCH_CFG3       0xe4

#define AHB_MEM_PREFETCH_CFG4       0xe8

#define AHB_MEM_PREFETCH_CFG1       0xf0

#define AHB_MEM_PREFETCH_CFG2       0xf4

#define   PREFETCH_ENB  BIT(31)

#define   MST_ID(x) (((x) & 0x1f) << 26)

#define   AHBDMA_MST_ID MST_ID(5)

#define   USB_MST_ID    MST_ID(6)

#define   USB2_MST_ID   MST_ID(18)

#define   USB3_MST_ID   MST_ID(17)

#define   ADDR_BNDRY(x) (((x) & 0xf) << 21)

#define   INACTIVITY_TIMEOUT(x) (((x) & 0xffff) << 0)

​

#define AHB_ARBITRATION_AHB_MEM_WRQUE_MST_ID    0xfc

​

#define AHB_ARBITRATION_XBAR_CTRL_SMMU_INIT_DONE BIT(17)

​

/*

 * INCORRECT_BASE_ADDR_LOW_BYTE: Legacy kernel DT files for Tegra SoCs

 * prior to Tegra124 generally use a physical base address ending in

 * 0x4 for the AHB IP block.  According to the TRM, the low byte

 * should be 0x0.  During device probing, this macro is used to detect

 * whether the passed-in physical address is incorrect, and if so, to

 * correct it.

 */