linux-imx

// SPDX-License-Identifier: GPL-2.0

​

/*

 * Palmchip BK3710 PATA controller driver

 *

 * Copyright (c) 2017 Samsung Electronics Co., Ltd.

 *      http://www.samsung.com

 *

 * Based on palm_bk3710.c:

 *

 * Copyright (C) 2006 Texas Instruments.

 * Copyright (C) 2007 MontaVista Software, Inc., <source@mvista.com>

 */

​

#include <linux/ata.h>

#include <linux/clk.h>

#include <linux/delay.h>

#include <linux/init.h>

#include <linux/ioport.h>

#include <linux/kernel.h>

#include <linux/libata.h>

#include <linux/module.h>

#include <linux/platform_device.h>

#include <linux/types.h>

​

#define DRV_NAME "pata_bk3710"

​

#define BK3710_TF_OFFSET    0x1F0

#define BK3710_CTL_OFFSET   0x3F6

​

#define BK3710_BMISP        0x02

#define BK3710_IDETIMP      0x40

#define BK3710_UDMACTL      0x48

#define BK3710_MISCCTL      0x50

#define BK3710_REGSTB       0x54

#define BK3710_REGRCVR      0x58

#define BK3710_DATSTB       0x5C

#define BK3710_DATRCVR      0x60

#define BK3710_DMASTB       0x64

#define BK3710_DMARCVR      0x68

#define BK3710_UDMASTB      0x6C

#define BK3710_UDMATRP      0x70

#define BK3710_UDMAENV      0x74

#define BK3710_IORDYTMP     0x78

​

static struct scsi_host_template pata_bk3710_sht = {

    ATA_BMDMA_SHT(DRV_NAME),

};

​

static unsigned int ideclk_period; /* in nanoseconds */

​

struct pata_bk3710_udmatiming {

    unsigned int rptime;    /* tRP -- Ready to pause time (nsec) */

    unsigned int cycletime; /* tCYCTYP2/2 -- avg Cycle Time (nsec) */

                /* tENV is always a minimum of 20 nsec */

};

​

static const struct pata_bk3710_udmatiming pata_bk3710_udmatimings[6] = {

    { 160, 240 / 2 },   /* UDMA Mode 0 */

    { 125, 160 / 2 },   /* UDMA Mode 1 */

    { 100, 120 / 2 },   /* UDMA Mode 2 */

    { 100,  90 / 2 },   /* UDMA Mode 3 */

    { 100,  60 / 2 },   /* UDMA Mode 4 */

    {  85,  40 / 2 },   /* UDMA Mode 5 */

};

​

static void pata_bk3710_setudmamode(void __iomem *base, unsigned int dev,

                    unsigned int mode)

{

    u32 val32;

    u16 val16;

    u8 tenv, trp, t0;

​

    /* DMA Data Setup */

    t0 = DIV_ROUND_UP(pata_bk3710_udmatimings[mode].cycletime,

              ideclk_period) - 1;

    tenv = DIV_ROUND_UP(20, ideclk_period) - 1;

    trp = DIV_ROUND_UP(pata_bk3710_udmatimings[mode].rptime,

               ideclk_period) - 1;

​

    /* udmastb Ultra DMA Access Strobe Width */

    val32 = ioread32(base + BK3710_UDMASTB) & (0xFF << (dev ? 0 : 8));

    val32 |= t0 << (dev ? 8 : 0);

    iowrite32(val32, base + BK3710_UDMASTB);

​

    /* udmatrp Ultra DMA Ready to Pause Time */

    val32 = ioread32(base + BK3710_UDMATRP) & (0xFF << (dev ? 0 : 8));

    val32 |= trp << (dev ? 8 : 0);

    iowrite32(val32, base + BK3710_UDMATRP);

​

    /* udmaenv Ultra DMA envelop Time */

    val32 = ioread32(base + BK3710_UDMAENV) & (0xFF << (dev ? 0 : 8));