linux-imx

/*

 * Libata based driver for Apple "macio" family of PATA controllers

 *

 * Copyright 2008/2009 Benjamin Herrenschmidt, IBM Corp

 *                     <benh@kernel.crashing.org>

 *

 * Some bits and pieces from drivers/ide/ppc/pmac.c

 *

 */

​

#undef DEBUG

#undef DEBUG_DMA

​

#include <linux/kernel.h>

#include <linux/module.h>

#include <linux/init.h>

#include <linux/blkdev.h>

#include <linux/ata.h>

#include <linux/libata.h>

#include <linux/adb.h>

#include <linux/pmu.h>

#include <linux/scatterlist.h>

#include <linux/of.h>

#include <linux/gfp.h>

#include <linux/pci.h>

​

#include <scsi/scsi.h>

#include <scsi/scsi_host.h>

#include <scsi/scsi_device.h>

​

#include <asm/macio.h>

#include <asm/io.h>

#include <asm/dbdma.h>

#include <asm/machdep.h>

#include <asm/pmac_feature.h>

#include <asm/mediabay.h>

​

#ifdef DEBUG_DMA

#define dev_dbgdma(dev, format, arg...)     \

    dev_printk(KERN_DEBUG , dev , format , ## arg)

#else

#define dev_dbgdma(dev, format, arg...)     \

    ({ if (0) dev_printk(KERN_DEBUG, dev, format, ##arg); 0; })

#endif

​

#define DRV_NAME    "pata_macio"

#define DRV_VERSION "0.9"

​

/* Models of macio ATA controller */

enum {

    controller_ohare,   /* OHare based */

    controller_heathrow,    /* Heathrow/Paddington */

    controller_kl_ata3, /* KeyLargo ATA-3 */

    controller_kl_ata4, /* KeyLargo ATA-4 */

    controller_un_ata6, /* UniNorth2 ATA-6 */

    controller_k2_ata6, /* K2 ATA-6 */

    controller_sh_ata6, /* Shasta ATA-6 */

};

​

static const char* macio_ata_names[] = {

    "OHare ATA",        /* OHare based */

    "Heathrow ATA",     /* Heathrow/Paddington */

    "KeyLargo ATA-3",   /* KeyLargo ATA-3 (MDMA only) */

    "KeyLargo ATA-4",   /* KeyLargo ATA-4 (UDMA/66) */

    "UniNorth ATA-6",   /* UniNorth2 ATA-6 (UDMA/100) */

    "K2 ATA-6",     /* K2 ATA-6 (UDMA/100) */

    "Shasta ATA-6",     /* Shasta ATA-6 (UDMA/133) */

};

​

/*

 * Extra registers, both 32-bit little-endian

 */

#define IDE_TIMING_CONFIG   0x200

#define IDE_INTERRUPT       0x300

​

/* Kauai (U2) ATA has different register setup */

#define IDE_KAUAI_PIO_CONFIG    0x200

#define IDE_KAUAI_ULTRA_CONFIG  0x210

#define IDE_KAUAI_POLL_CONFIG   0x220

​

/*

 * Timing configuration register definitions

 */

​

/* Number of IDE_SYSCLK_NS ticks, argument is in nanoseconds */

#define SYSCLK_TICKS(t)     (((t) + IDE_SYSCLK_NS - 1) / IDE_SYSCLK_NS)

#define SYSCLK_TICKS_66(t)  (((t) + IDE_SYSCLK_66_NS - 1) / IDE_SYSCLK_66_NS)

#define IDE_SYSCLK_NS       30  /* 33Mhz cell */

#define IDE_SYSCLK_66_NS    15  /* 66Mhz cell */

​

/* 133Mhz cell, found in shasta.

 * See comments about 100 Mhz Uninorth 2...