Source
/*
* Driver for the Octeon bootbus compact flash.
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2005 - 2012 Cavium Inc.
* Copyright (C) 2008 Wind River Systems
*/
/*
* The Octeon bootbus compact flash interface is connected in at least
* 3 different configurations on various evaluation boards:
*
* -- 8 bits no irq, no DMA
* -- 16 bits no irq, no DMA
* -- 16 bits True IDE mode with DMA, but no irq.
*
* In the last case the DMA engine can generate an interrupt when the
* transfer is complete. For the first two cases only PIO is supported.
*
*/
/* Poll interval in nS. */
struct octeon_cf_port {
struct hrtimer delayed_finish;
struct ata_port *ap;
int dma_finished;
void *c0;
unsigned int cs0;
unsigned int cs1;
bool is_true_ide;
u64 dma_base;
};
static struct scsi_host_template octeon_cf_sht = {
ATA_PIO_SHT(DRV_NAME),
};
static int enable_dma;
module_param(enable_dma, int, 0444);
MODULE_PARM_DESC(enable_dma,
"Enable use of DMA on interfaces that support it (0=no dma [default], 1=use dma)");
/**
* Convert nanosecond based time to setting used in the
* boot bus timing register, based on timing multiple
*/
static unsigned int ns_to_tim_reg(unsigned int tim_mult, unsigned int nsecs)
{
unsigned int val;
/*
* Compute # of eclock periods to get desired duration in
* nanoseconds.
*/
val = DIV_ROUND_UP(nsecs * (octeon_get_io_clock_rate() / 1000000),
1000 * tim_mult);
return val;
}
static void octeon_cf_set_boot_reg_cfg(int cs, unsigned int multiplier)
{
union cvmx_mio_boot_reg_cfgx reg_cfg;
unsigned int tim_mult;