#ifndef DRIVERS_ATM_uPD98401_H
#define DRIVERS_ATM_uPD98401_H
#define MAX_CRAM_SIZE (1 << 18)
#define RAM_INCREMENT 1024
#define uPD98401_PORTS 0x24
#define uPD98401_OPEN_CHAN 0x20000000
#define uPD98401_CHAN_ADDR 0x0003fff8
#define uPD98401_CHAN_ADDR_SHIFT 3
#define uPD98401_CLOSE_CHAN 0x24000000
#define uPD98401_CHAN_RT 0x02000000
#define uPD98401_DEACT_CHAN 0x28000000
#define uPD98401_TX_READY 0x30000000
#define uPD98401_ADD_BAT 0x34000000
#define uPD98401_POOL 0x000f0000
#define uPD98401_POOL_SHIFT 16
#define uPD98401_POOL_NUMBAT 0x0000ffff
#define uPD98401_NOP 0x3f000000
#define uPD98401_IND_ACC 0x00000000
#define uPD98401_IA_RW 0x10000000
#define uPD98401_IA_B3 0x08000000
#define uPD98401_IA_B2 0x04000000
#define uPD98401_IA_B1 0x02000000
#define uPD98401_IA_B0 0x01000000
#define uPD98401_IA_BALL 0x0f000000
#define uPD98401_IA_TGT 0x000c0000
#define uPD98401_IA_TGT_SHIFT 18
#define uPD98401_IA_TGT_CM 0
#define uPD98401_IA_TGT_SAR 1
#define uPD98401_IA_TGT_PHY 3
#define uPD98401_IA_ADDR 0x0003ffff
#define uPD98401_BUSY 0x80000000
#define uPD98401_LOCKED 0x40000000
#define uPD98401_AAL5_UINFO 0xffff0000
#define uPD98401_AAL5_UINFO_SHIFT 16
#define uPD98401_AAL5_SIZE 0x0000ffff
#define uPD98401_AAL5_CHAN 0x7fff0000
#define uPD98401_AAL5_CHAN_SHIFT 16