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committed 7195439d1d7 * if the bit is set to 1, it is used by some part of the chip and not our code./* * Broadcom specific AMBA * ChipCommon core driver * * Copyright 2005, Broadcom Corporation * Copyright 2006, 2007, Michael Buesch <m@bues.ch> * Copyright 2012, Hauke Mehrtens <hauke@hauke-m.de> * * Licensed under the GNU/GPL. See COPYING for details. */static inline u32 bcma_cc_write32_masked(struct bcma_drv_cc *cc, u16 offset, u32 mask, u32 value){ value &= mask; value |= bcma_cc_read32(cc, offset) & ~mask; bcma_cc_write32(cc, offset, value); return value;}u32 bcma_chipco_get_alp_clock(struct bcma_drv_cc *cc){ if (cc->capabilities & BCMA_CC_CAP_PMU) return bcma_pmu_get_alp_clock(cc); return 20000000;}EXPORT_SYMBOL_GPL(bcma_chipco_get_alp_clock);static bool bcma_core_cc_has_pmu_watchdog(struct bcma_drv_cc *cc){ struct bcma_bus *bus = cc->core->bus; if (cc->capabilities & BCMA_CC_CAP_PMU) { if (bus->chipinfo.id == BCMA_CHIP_ID_BCM53573) { WARN(bus->chipinfo.rev <= 1, "No watchdog available\n"); /* 53573B0 and 53573B1 have bugged PMU watchdog. It can * be enabled but timer can't be bumped. Use CC one * instead. */ return false; } return true; } else { return false; }}static u32 bcma_chipco_watchdog_get_max_timer(struct bcma_drv_cc *cc){ struct bcma_bus *bus = cc->core->bus; u32 nb; if (bcma_core_cc_has_pmu_watchdog(cc)) { if (bus->chipinfo.id == BCMA_CHIP_ID_BCM4706) nb = 32; else if (cc->core->id.rev < 26) nb = 16; else nb = (cc->core->id.rev >= 37) ? 32 : 24; } else { nb = 28; } if (nb == 32) return 0xffffffff; else return (1 << nb) - 1;}static u32 bcma_chipco_watchdog_timer_set_wdt(struct bcm47xx_wdt *wdt, u32 ticks){ struct bcma_drv_cc *cc = bcm47xx_wdt_get_drvdata(wdt); return bcma_chipco_watchdog_timer_set(cc, ticks);}static u32 bcma_chipco_watchdog_timer_set_ms_wdt(struct bcm47xx_wdt *wdt, u32 ms){ struct bcma_drv_cc *cc = bcm47xx_wdt_get_drvdata(wdt); u32 ticks; ticks = bcma_chipco_watchdog_timer_set(cc, cc->ticks_per_ms * ms); return ticks / cc->ticks_per_ms;