#include "bcma_private.h"
#include <linux/bcma/bcma.h>
static u32 bcma_core_pcie2_cfg_read(struct bcma_drv_pcie2 *pcie2, u32 addr)
pcie2_write32(pcie2, BCMA_CORE_PCIE2_CONFIGINDADDR, addr);
pcie2_read32(pcie2, BCMA_CORE_PCIE2_CONFIGINDADDR);
return pcie2_read32(pcie2, BCMA_CORE_PCIE2_CONFIGINDDATA);
static void bcma_core_pcie2_cfg_write(struct bcma_drv_pcie2 *pcie2, u32 addr,
pcie2_write32(pcie2, BCMA_CORE_PCIE2_CONFIGINDADDR, addr);
pcie2_write32(pcie2, BCMA_CORE_PCIE2_CONFIGINDDATA, val);
static u32 bcma_core_pcie2_war_delay_perst_enab(struct bcma_drv_pcie2 *pcie2,
val = pcie2_read32(pcie2, BCMA_CORE_PCIE2_CLK_CONTROL);
val |= PCIE2_CLKC_DLYPERST;
val &= ~PCIE2_CLKC_DISSPROMLD;
val &= ~PCIE2_CLKC_DLYPERST;
val |= PCIE2_CLKC_DISSPROMLD;
pcie2_write32(pcie2, (BCMA_CORE_PCIE2_CLK_CONTROL), val);
return pcie2_read32(pcie2, BCMA_CORE_PCIE2_CLK_CONTROL);
static void bcma_core_pcie2_set_ltr_vals(struct bcma_drv_pcie2 *pcie2)
pcie2_write32(pcie2, BCMA_CORE_PCIE2_CONFIGINDADDR, 0x844);
pcie2_write32(pcie2, BCMA_CORE_PCIE2_CONFIGINDDATA, 0x883c883c);
pcie2_write32(pcie2, BCMA_CORE_PCIE2_CONFIGINDADDR, 0x848);