linux-imx

/*

 * EIM driver for Freescale's i.MX chips

 *

 * Copyright (C) 2013 Freescale Semiconductor, Inc.

 *

 * This file is licensed under the terms of the GNU General Public

 * License version 2. This program is licensed "as is" without any

 * warranty of any kind, whether express or implied.

 */

#include <linux/module.h>

#include <linux/clk.h>

#include <linux/io.h>

#include <linux/of_device.h>

#include <linux/mfd/syscon.h>

#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>

#include <linux/regmap.h>

​

struct imx_weim_devtype {

    unsigned int    cs_count;

    unsigned int    cs_regs_count;

    unsigned int    cs_stride;

};

​

static const struct imx_weim_devtype imx1_weim_devtype = {

    .cs_count   = 6,

    .cs_regs_count  = 2,

    .cs_stride  = 0x08,

};

​

static const struct imx_weim_devtype imx27_weim_devtype = {

    .cs_count   = 6,

    .cs_regs_count  = 3,

    .cs_stride  = 0x10,

};

​

static const struct imx_weim_devtype imx50_weim_devtype = {

    .cs_count   = 4,

    .cs_regs_count  = 6,

    .cs_stride  = 0x18,

};

​

static const struct imx_weim_devtype imx51_weim_devtype = {

    .cs_count   = 6,

    .cs_regs_count  = 6,

    .cs_stride  = 0x18,

};

​

#define MAX_CS_REGS_COUNT   6

#define MAX_CS_COUNT        6

#define OF_REG_SIZE     3

​

struct cs_timing {

    bool is_applied;

    u32 regs[MAX_CS_REGS_COUNT];

};

​

struct cs_timing_state {

    struct cs_timing cs[MAX_CS_COUNT];

};

​

static const struct of_device_id weim_id_table[] = {

    /* i.MX1/21 */

    { .compatible = "fsl,imx1-weim", .data = &imx1_weim_devtype, },

    /* i.MX25/27/31/35 */

    { .compatible = "fsl,imx27-weim", .data = &imx27_weim_devtype, },

    /* i.MX50/53/6Q */

    { .compatible = "fsl,imx50-weim", .data = &imx50_weim_devtype, },

    { .compatible = "fsl,imx6q-weim", .data = &imx50_weim_devtype, },

    /* i.MX51 */

    { .compatible = "fsl,imx51-weim", .data = &imx51_weim_devtype, },

    { }

};

MODULE_DEVICE_TABLE(of, weim_id_table);

​

static int __init imx_weim_gpr_setup(struct platform_device *pdev)

{

    struct device_node *np = pdev->dev.of_node;

    struct property *prop;

    const __be32 *p;

    struct regmap *gpr;

    u32 gprvals[4] = {

        05, /* CS0(128M) CS1(0M)  CS2(0M)  CS3(0M)  */

        033,    /* CS0(64M)  CS1(64M) CS2(0M)  CS3(0M)  */

        0113,   /* CS0(64M)  CS1(32M) CS2(32M) CS3(0M)  */

        01111,  /* CS0(32M)  CS1(32M) CS2(32M) CS3(32M) */

    };

    u32 gprval = 0;

    u32 val;

    int cs = 0;

    int i = 0;

​

    gpr = syscon_regmap_lookup_by_phandle(np, "fsl,weim-cs-gpr");