linux-imx

/*

 * UniNorth AGPGART routines.

 */

#include <linux/module.h>

#include <linux/pci.h>

#include <linux/slab.h>

#include <linux/init.h>

#include <linux/pagemap.h>

#include <linux/agp_backend.h>

#include <linux/delay.h>

#include <linux/vmalloc.h>

#include <asm/uninorth.h>

#include <asm/prom.h>

#include <asm/pmac_feature.h>

#include "agp.h"

​

/*

 * NOTES for uninorth3 (G5 AGP) supports :

 *

 * There maybe also possibility to have bigger cache line size for

 * agp (see pmac_pci.c and look for cache line). Need to be investigated

 * by someone.

 *

 * PAGE size are hardcoded but this may change, see asm/page.h.

 *

 * Jerome Glisse <j.glisse@gmail.com>

 */

static int uninorth_rev;

static int is_u3;

static u32 scratch_value;

​

#define DEFAULT_APERTURE_SIZE 256

#define DEFAULT_APERTURE_STRING "256"

static char *aperture = NULL;

​

static int uninorth_fetch_size(void)

{

    int i, size = 0;

    struct aper_size_info_32 *values =

        A_SIZE_32(agp_bridge->driver->aperture_sizes);

​

    if (aperture) {

        char *save = aperture;

​

        size = memparse(aperture, &aperture) >> 20;

        aperture = save;

​

        for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++)

            if (size == values[i].size)

                break;

​

        if (i == agp_bridge->driver->num_aperture_sizes) {

            dev_err(&agp_bridge->dev->dev, "invalid aperture size, "

                "using default\n");

            size = 0;

            aperture = NULL;

        }

    }

​

    if (!size) {

        for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++)

            if (values[i].size == DEFAULT_APERTURE_SIZE)

                break;

    }

​

    agp_bridge->previous_size =

        agp_bridge->current_size = (void *)(values + i);

    agp_bridge->aperture_size_idx = i;

    return values[i].size;

}

​

static void uninorth_tlbflush(struct agp_memory *mem)

{

    u32 ctrl = UNI_N_CFG_GART_ENABLE;

​

    if (is_u3)

        ctrl |= U3_N_CFG_GART_PERFRD;

    pci_write_config_dword(agp_bridge->dev, UNI_N_CFG_GART_CTRL,

                   ctrl | UNI_N_CFG_GART_INVAL);

    pci_write_config_dword(agp_bridge->dev, UNI_N_CFG_GART_CTRL, ctrl);

​

    if (!mem && uninorth_rev <= 0x30) {

        pci_write_config_dword(agp_bridge->dev, UNI_N_CFG_GART_CTRL,

                       ctrl | UNI_N_CFG_GART_2xRESET);

        pci_write_config_dword(agp_bridge->dev, UNI_N_CFG_GART_CTRL,

                       ctrl);

    }

}

​

static void uninorth_cleanup(void)

{

    u32 tmp;