linux-imx

// SPDX-License-Identifier: GPL-2.0

/*

 * Copyright (c) 2010-2012 Broadcom. All rights reserved.

 * Copyright (c) 2013 Lubomir Rintel

 */

​

#include <linux/hw_random.h>

#include <linux/io.h>

#include <linux/kernel.h>

#include <linux/module.h>

#include <linux/of_address.h>

#include <linux/of_platform.h>

#include <linux/platform_device.h>

#include <linux/printk.h>

#include <linux/clk.h>

​

#define RNG_CTRL    0x0

#define RNG_STATUS  0x4

#define RNG_DATA    0x8

#define RNG_INT_MASK    0x10

​

/* enable rng */

#define RNG_RBGEN   0x1

​

/* the initial numbers generated are "less random" so will be discarded */

#define RNG_WARMUP_COUNT 0x40000

​

#define RNG_INT_OFF 0x1

​

struct bcm2835_rng_priv {

    struct hwrng rng;

    void __iomem *base;

    bool mask_interrupts;

    struct clk *clk;

};

​

static inline struct bcm2835_rng_priv *to_rng_priv(struct hwrng *rng)

{

    return container_of(rng, struct bcm2835_rng_priv, rng);

}

​

static inline u32 rng_readl(struct bcm2835_rng_priv *priv, u32 offset)

{

    /* MIPS chips strapped for BE will automagically configure the

     * peripheral registers for CPU-native byte order.

     */

    if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))

        return __raw_readl(priv->base + offset);

    else

        return readl(priv->base + offset);

}

​

static inline void rng_writel(struct bcm2835_rng_priv *priv, u32 val,

                  u32 offset)

{

    if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))

        __raw_writel(val, priv->base + offset);

    else

        writel(val, priv->base + offset);

}

​

static int bcm2835_rng_read(struct hwrng *rng, void *buf, size_t max,

                   bool wait)