Source
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struct kcs_bmc *kcs_bmc_alloc(struct device *dev, int sizeof_priv, u32 channel)
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (c) 2015-2018, Intel Corporation.
*/
/* IPMI 2.0 - Table 9-1, KCS Interface Status Register Bits */
/* IPMI 2.0 - Table 9-2, KCS Interface State Bits */
enum kcs_states {
IDLE_STATE = 0,
READ_STATE = 1,
WRITE_STATE = 2,
ERROR_STATE = 3,
};
/* IPMI 2.0 - Table 9-3, KCS Interface Control Codes */
static inline u8 read_data(struct kcs_bmc *kcs_bmc)
{
return kcs_bmc->io_inputb(kcs_bmc, kcs_bmc->ioreg.idr);
}
static inline void write_data(struct kcs_bmc *kcs_bmc, u8 data)
{
kcs_bmc->io_outputb(kcs_bmc, kcs_bmc->ioreg.odr, data);
}
static inline u8 read_status(struct kcs_bmc *kcs_bmc)
{
return kcs_bmc->io_inputb(kcs_bmc, kcs_bmc->ioreg.str);
}
static inline void write_status(struct kcs_bmc *kcs_bmc, u8 data)
{
kcs_bmc->io_outputb(kcs_bmc, kcs_bmc->ioreg.str, data);
}
static void update_status_bits(struct kcs_bmc *kcs_bmc, u8 mask, u8 val)
{
u8 tmp = read_status(kcs_bmc);
tmp &= ~mask;
tmp |= val & mask;
write_status(kcs_bmc, tmp);
}
static inline void set_state(struct kcs_bmc *kcs_bmc, u8 state)
{
update_status_bits(kcs_bmc, KCS_STATUS_STATE_MASK,
KCS_STATUS_STATE(state));
}
static void kcs_force_abort(struct kcs_bmc *kcs_bmc)
{
set_state(kcs_bmc, ERROR_STATE);
read_data(kcs_bmc);
write_data(kcs_bmc, KCS_ZERO_DATA);
kcs_bmc->phase = KCS_PHASE_ERROR;
kcs_bmc->data_in_avail = false;
kcs_bmc->data_in_idx = 0;