linux-imx

/*

 *  Cirrus Logic CLPS711X CLK driver

 *

 *  Copyright (C) 2014 Alexander Shiyan <shc_work@mail.ru>

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License as published by

 * the Free Software Foundation; either version 2 of the License, or

 * (at your option) any later version.

 */

​

#include <linux/clk-provider.h>

#include <linux/clkdev.h>

#include <linux/io.h>

#include <linux/ioport.h>

#include <linux/of_address.h>

#include <linux/slab.h>

#include <linux/mfd/syscon/clps711x.h>

​

#include <dt-bindings/clock/clps711x-clock.h>

​

#define CLPS711X_SYSCON1    (0x0100)

#define CLPS711X_SYSCON2    (0x1100)

#define CLPS711X_SYSFLG2    (CLPS711X_SYSCON2 + SYSFLG_OFFSET)

#define CLPS711X_PLLR       (0xa5a8)

​

#define CLPS711X_EXT_FREQ   (13000000)

#define CLPS711X_OSC_FREQ   (3686400)

​

static const struct clk_div_table spi_div_table[] = {

    { .val = 0, .div = 32, },

    { .val = 1, .div = 8, },

    { .val = 2, .div = 2, },

    { .val = 3, .div = 1, },

};

​

static const struct clk_div_table timer_div_table[] = {

    { .val = 0, .div = 256, },

    { .val = 1, .div = 1, },

};

​

struct clps711x_clk {

    spinlock_t          lock;

    struct clk_hw_onecell_data  clk_data;

};

​

static void __init clps711x_clk_init_dt(struct device_node *np)

{

    u32 tmp, f_cpu, f_pll, f_bus, f_tim, f_pwm, f_spi, fref = 0;

    struct clps711x_clk *clps711x_clk;

    void __iomem *base;

​

    WARN_ON(of_property_read_u32(np, "startup-frequency", &fref));

​

    base = of_iomap(np, 0);

    BUG_ON(!base);

​

    clps711x_clk = kzalloc(struct_size(clps711x_clk, clk_data.hws,

                       CLPS711X_CLK_MAX),

                   GFP_KERNEL);

    BUG_ON(!clps711x_clk);

​

    spin_lock_init(&clps711x_clk->lock);

​

    /* Read PLL multiplier value and sanity check */

    tmp = readl(base + CLPS711X_PLLR) >> 24;

    if (((tmp >= 10) && (tmp <= 50)) || !fref)

        f_pll = DIV_ROUND_UP(CLPS711X_OSC_FREQ * tmp, 2);

    else

        f_pll = fref;

​

    tmp = readl(base + CLPS711X_SYSFLG2);

    if (tmp & SYSFLG2_CKMODE) {

        f_cpu = CLPS711X_EXT_FREQ;

        f_bus = CLPS711X_EXT_FREQ;

        f_spi = DIV_ROUND_CLOSEST(CLPS711X_EXT_FREQ, 96);

        f_pll = 0;

        f_pwm = DIV_ROUND_CLOSEST(CLPS711X_EXT_FREQ, 128);

    } else {

        f_cpu = f_pll;

        if (f_cpu > 36864000)

            f_bus = DIV_ROUND_UP(f_cpu, 2);

        else

            f_bus = 36864000 / 2;

        f_spi = DIV_ROUND_CLOSEST(f_cpu, 576);

        f_pwm = DIV_ROUND_CLOSEST(f_cpu, 768);

    }

​

    if (tmp & SYSFLG2_CKMODE) {

        if (readl(base + CLPS711X_SYSCON2) & SYSCON2_OSTB)

            f_tim = DIV_ROUND_CLOSEST(CLPS711X_EXT_FREQ, 26);

        else