linux-imx

// SPDX-License-Identifier: GPL-2.0

/*

 * Copyright (C) 2014 Intel Corporation

 *

 * Adjustable fractional divider clock implementation.

 * Output rate = (m / n) * parent_rate.

 * Uses rational best approximation algorithm.

 */

​

#include <linux/clk-provider.h>

#include <linux/module.h>

#include <linux/device.h>

#include <linux/slab.h>

#include <linux/rational.h>

​

static unsigned long clk_fd_recalc_rate(struct clk_hw *hw,

                    unsigned long parent_rate)

{

    struct clk_fractional_divider *fd = to_clk_fd(hw);

    unsigned long flags = 0;

    unsigned long m, n;

    u32 val;

    u64 ret;

​

    if (fd->lock)

        spin_lock_irqsave(fd->lock, flags);

    else

        __acquire(fd->lock);

​

    val = clk_readl(fd->reg);

​

    if (fd->lock)

        spin_unlock_irqrestore(fd->lock, flags);

    else

        __release(fd->lock);

​

    m = (val & fd->mmask) >> fd->mshift;

    n = (val & fd->nmask) >> fd->nshift;

​

    if (fd->flags & CLK_FRAC_DIVIDER_ZERO_BASED) {

        m++;

        n++;

    }

​

    if (!n || !m)

        return parent_rate;

​

    ret = (u64)parent_rate * m;

    do_div(ret, n);

​

    return ret;

}

​

static void clk_fd_general_approximation(struct clk_hw *hw, unsigned long rate,

                     unsigned long *parent_rate,

                     unsigned long *m, unsigned long *n)

{

    struct clk_fractional_divider *fd = to_clk_fd(hw);

    unsigned long scale;

​

    /*

     * Get rate closer to *parent_rate to guarantee there is no overflow

     * for m and n. In the result it will be the nearest rate left shifted