CLK_OF_DECLARE(nspire_clk_cx, "lsi,nspire-cx-clock", nspire_clk_setup_cx);
#include <linux/clk-provider.h>
#include <linux/of_address.h>
#define MHZ (1000 * 1000)
#define BASE_CPU_MASK 0x7F
#define CPU_AHB_MASK 0x07
#define FIXED_BASE_SHIFT 8
#define FIXED_BASE_MASK 0x01
#define CLASSIC_BASE_SHIFT 16
#define CLASSIC_BASE_MASK 0x1F
#define CX_BASE_MASK 0x3F
#define CX_UNKNOWN_SHIFT 21
#define CX_UNKNOWN_MASK 0x03
#define EXTRACT(var, prop) (((var)>>prop##_SHIFT) & prop##_MASK)
static void nspire_clkinfo_cx(u32 val, struct nspire_clk_info *clk)
if (EXTRACT(val, FIXED_BASE))
clk->base_clock = 48 * MHZ;
clk->base_clock = 6 * EXTRACT(val, CX_BASE) * MHZ;
clk->base_cpu_ratio = EXTRACT(val, BASE_CPU) * EXTRACT(val, CX_UNKNOWN);
clk->base_ahb_ratio = clk->base_cpu_ratio * (EXTRACT(val, CPU_AHB) + 1);
static void nspire_clkinfo_classic(u32 val, struct nspire_clk_info *clk)
if (EXTRACT(val, FIXED_BASE))
clk->base_clock = 27 * MHZ;
clk->base_clock = (300 - 6 * EXTRACT(val, CLASSIC_BASE)) * MHZ;
clk->base_cpu_ratio = EXTRACT(val, BASE_CPU) * 2;