#include <linux/clkdev.h>
#include <soc/imx/revision.h>
#include <soc/imx/timer.h>
#define MX35_CCM_BASE_ADDR 0x53f80000
#define MX35_GPT1_BASE_ADDR 0x53f90000
#define MX35_INT_GPT (NR_IRQS_LEGACY + 29)
#define MXC_CCM_PDR0 0x04
#define MX35_CCM_PDR2 0x0c
#define MX35_CCM_PDR3 0x10
#define MX35_CCM_PDR4 0x14
#define MX35_CCM_MPCTL 0x1c
#define MX35_CCM_PPCTL 0x20
#define MX35_CCM_CGR0 0x2c
#define MX35_CCM_CGR1 0x30
#define MX35_CCM_CGR2 0x34
#define MX35_CCM_CGR3 0x38
unsigned char arm, ahb, sel;
static struct arm_ahb_div clk_consumer[] = {
{ .arm = 1, .ahb = 4, .sel = 0},
{ .arm = 1, .ahb = 3, .sel = 1},
{ .arm = 2, .ahb = 2, .sel = 0},
{ .arm = 0, .ahb = 0, .sel = 0},
{ .arm = 0, .ahb = 0, .sel = 0},
{ .arm = 0, .ahb = 0, .sel = 0},
{ .arm = 4, .ahb = 1, .sel = 0},
{ .arm = 1, .ahb = 5, .sel = 0},
{ .arm = 1, .ahb = 8, .sel = 0},
{ .arm = 1, .ahb = 6, .sel = 1},
{ .arm = 2, .ahb = 4, .sel = 0},
{ .arm = 0, .ahb = 0, .sel = 0},
{ .arm = 0, .ahb = 0, .sel = 0},
{ .arm = 0, .ahb = 0, .sel = 0},
{ .arm = 4, .ahb = 2, .sel = 0},
{ .arm = 0, .ahb = 0, .sel = 0},
static char hsp_div_532[] = { 4, 8, 3, 0 };
static char hsp_div_400[] = { 3, 6, 3, 0 };
static struct clk_onecell_data clk_data;
static const char *std_sel[] = {"ppll", "arm"};
static const char *ipg_per_sel[] = {"ahb_per_div", "arm_per_div"};
ckih, mpll, ppll, mpll_075, arm, hsp, hsp_div, hsp_sel, ahb,
ipg, arm_per_div, ahb_per_div, ipg_per, uart_sel, uart_div,
esdhc_sel, esdhc1_div, esdhc2_div, esdhc3_div, spdif_sel,
spdif_div_pre, spdif_div_post, ssi_sel, ssi1_div_pre,
ssi1_div_post, ssi2_div_pre, ssi2_div_post, usb_sel, usb_div,
nfc_div, asrc_gate, pata_gate, audmux_gate, can1_gate,
can2_gate, cspi1_gate, cspi2_gate, ect_gate, edio_gate,
emi_gate, epit1_gate, epit2_gate, esai_gate, esdhc1_gate,
esdhc2_gate, esdhc3_gate, fec_gate, gpio1_gate, gpio2_gate,
gpio3_gate, gpt_gate, i2c1_gate, i2c2_gate, i2c3_gate,
iomuxc_gate, ipu_gate, kpp_gate, mlb_gate, mshc_gate,
owire_gate, pwm_gate, rngc_gate, rtc_gate, rtic_gate, scc_gate,
sdma_gate, spba_gate, spdif_gate, ssi1_gate, ssi2_gate,
uart1_gate, uart2_gate, uart3_gate, usbotg_gate, wdog_gate,
max_gate, admux_gate, csi_gate, csi_div, csi_sel, iim_gate,
gpu2d_gate, ckil, clk_max
static struct clk *clk[clk_max];
static struct clk ** const uart_clks[] __initconst = {