linux-imx

/*

 * Copyright 2011-2013 Freescale Semiconductor, Inc.

 * Copyright 2011 Linaro Ltd.

 *

 * The code contained herein is licensed under the GNU General Public

 * License. You may obtain a copy of the GNU General Public License

 * Version 2 or later at the following locations:

 *

 * http://www.opensource.org/licenses/gpl-license.html

 * http://www.gnu.org/copyleft/gpl.html

 */

​

#include <linux/init.h>

#include <linux/types.h>

#include <linux/clk.h>

#include <linux/clkdev.h>

#include <linux/err.h>

#include <linux/io.h>

#include <linux/of.h>

#include <linux/of_address.h>

#include <linux/of_irq.h>

#include <soc/imx/revision.h>

#include <dt-bindings/clock/imx6qdl-clock.h>

​

#include "clk.h"

​

static const char *step_sels[]  = { "osc", "pll2_pfd2_396m", };

static const char *pll1_sw_sels[]   = { "pll1_sys", "step", };

static const char *periph_pre_sels[]    = { "pll2_bus", "pll2_pfd2_396m", "pll2_pfd0_352m", "pll2_198m", };

static const char *periph_clk2_sels[]   = { "pll3_usb_otg", "osc", "osc", "dummy", };

static const char *periph2_clk2_sels[]  = { "pll3_usb_otg", "pll2_bus", };

static const char *periph_sels[]    = { "periph_pre", "periph_clk2", };

static const char *periph2_sels[]   = { "periph2_pre", "periph2_clk2", };

static const char *axi_sels[]       = { "periph", "pll2_pfd2_396m", "periph", "pll3_pfd1_540m", };

static const char *audio_sels[] = { "pll4_audio_div", "pll3_pfd2_508m", "pll3_pfd3_454m", "pll3_usb_otg", };

static const char *gpu_axi_sels[]   = { "axi", "ahb", };

static const char *pre_axi_sels[]   = { "axi", "ahb", };

static const char *gpu2d_core_sels[]    = { "axi", "pll3_usb_otg", "pll2_pfd0_352m", "pll2_pfd2_396m", };

static const char *gpu2d_core_sels_2[]  = { "mmdc_ch0_axi", "pll3_usb_otg", "pll2_pfd1_594m", "pll3_pfd0_720m",};

static const char *gpu3d_core_sels[]    = { "mmdc_ch0_axi", "pll3_usb_otg", "pll2_pfd1_594m", "pll2_pfd2_396m", };

static const char *gpu3d_shader_sels[] = { "mmdc_ch0_axi", "pll3_usb_otg", "pll2_pfd1_594m", "pll3_pfd0_720m", };

static const char *ipu_sels[]       = { "mmdc_ch0_axi", "pll2_pfd2_396m", "pll3_120m", "pll3_pfd1_540m", };

static const char *ldb_di_sels[]    = { "pll5_video_div", "pll2_pfd0_352m", "pll2_pfd2_396m", "mmdc_ch1_axi", "pll3_usb_otg", };

static const char *ipu_di_pre_sels[]    = { "mmdc_ch0_axi", "pll3_usb_otg", "pll5_video_div", "pll2_pfd0_352m", "pll2_pfd2_396m", "pll3_pfd1_540m", };

static const char *ipu1_di0_sels[]  = { "ipu1_di0_pre", "dummy", "dummy", "ldb_di0", "ldb_di1", };

static const char *ipu1_di1_sels[]  = { "ipu1_di1_pre", "dummy", "dummy", "ldb_di0", "ldb_di1", };

static const char *ipu2_di0_sels[]  = { "ipu2_di0_pre", "dummy", "dummy", "ldb_di0", "ldb_di1", };

static const char *ipu2_di1_sels[]  = { "ipu2_di1_pre", "dummy", "dummy", "ldb_di0", "ldb_di1", };

static const char *ipu1_di0_sels_2[]    = { "ipu1_di0_pre", "dummy", "dummy", "ldb_di0_podf", "ldb_di1_podf", };

static const char *ipu1_di1_sels_2[]    = { "ipu1_di1_pre", "dummy", "dummy", "ldb_di0_podf", "ldb_di1_podf", };

static const char *ipu2_di0_sels_2[]    = { "ipu2_di0_pre", "dummy", "dummy", "ldb_di0_podf", "ldb_di1_podf", };

static const char *ipu2_di1_sels_2[]    = { "ipu2_di1_pre", "dummy", "dummy", "ldb_di0_podf", "ldb_di1_podf", };

static const char *hsi_tx_sels[]    = { "pll3_120m", "pll2_pfd2_396m", };

static const char *pcie_axi_sels[]  = { "axi", "ahb", };

static const char *ssi_sels[]       = { "pll3_pfd2_508m", "pll3_pfd3_454m", "pll4_audio_div", };

static const char *usdhc_sels[] = { "pll2_pfd2_396m", "pll2_pfd0_352m", };

static const char *enfc_sels[]  = { "pll2_pfd0_352m", "pll2_bus", "pll3_usb_otg", "pll2_pfd2_396m", };

static const char *enfc_sels_2[] = {"pll2_pfd0_352m", "pll2_bus", "pll3_usb_otg", "pll2_pfd2_396m", "pll3_pfd3_454m", "dummy", };

static const char *eim_sels[]       = { "pll2_pfd2_396m", "pll3_usb_otg", "axi", "pll2_pfd0_352m", };

static const char *eim_slow_sels[]      = { "axi", "pll3_usb_otg", "pll2_pfd2_396m", "pll2_pfd0_352m", };

static const char *vdo_axi_sels[]   = { "axi", "ahb", };

static const char *vpu_axi_sels[]   = { "axi", "pll2_pfd2_396m", "pll2_pfd0_352m", };

static const char *uart_sels[] = { "pll3_80m", "osc", };

static const char *ipg_per_sels[] = { "ipg", "osc", };

static const char *ecspi_sels[] = { "pll3_60m", "osc", };

static const char *can_sels[] = { "pll3_60m", "osc", "pll3_80m", };

static const char *cko1_sels[]  = { "pll3_usb_otg", "pll2_bus", "pll1_sys", "pll5_video_div",

                    "video_27m", "axi", "enfc", "ipu1_di0", "ipu1_di1", "ipu2_di0",

                    "ipu2_di1", "ahb", "ipg", "ipg_per", "ckil", "pll4_audio_div", };

static const char *cko2_sels[] = {

    "mmdc_ch0_axi", "mmdc_ch1_axi", "usdhc4", "usdhc1",

    "gpu2d_axi", "dummy", "ecspi_root", "gpu3d_axi",

    "usdhc3", "dummy", "arm", "ipu1",

    "ipu2", "vdo_axi", "osc", "gpu2d_core",

    "gpu3d_core", "usdhc2", "ssi1", "ssi2",

    "ssi3", "gpu3d_shader", "vpu_axi", "can_root",

    "ldb_di0", "ldb_di1", "esai_extal", "eim_slow",

    "uart_serial", "spdif", "asrc", "hsi_tx",

};

static const char *cko_sels[] = { "cko1", "cko2", };

static const char *lvds_sels[] = {

    "dummy", "dummy", "dummy", "dummy", "dummy", "dummy",

    "pll4_audio", "pll5_video", "pll8_mlb", "enet_ref",

    "pcie_ref_125m", "sata_ref_100m",  "usbphy1", "usbphy2",

    "dummy", "dummy", "dummy", "dummy", "osc",

};

static const char *pll_bypass_src_sels[] = { "osc", "lvds1_in", "lvds2_in", "dummy", };

static const char *pll1_bypass_sels[] = { "pll1", "pll1_bypass_src", };

static const char *pll2_bypass_sels[] = { "pll2", "pll2_bypass_src", };

static const char *pll3_bypass_sels[] = { "pll3", "pll3_bypass_src", };

static const char *pll4_bypass_sels[] = { "pll4", "pll4_bypass_src", };

static const char *pll5_bypass_sels[] = { "pll5", "pll5_bypass_src", };