Source
* "Allwinner H6 V200 User Manual V1.1"; and the parent APB buses are verified
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (c) 2017 Icenowy Zheng <icenowy@aosc.xyz>
*/
/*
* Information about AR100 and AHB/APB clocks in R_CCU are gathered from
* clock definitions in the BSP source code.
*/
static const char * const ar100_r_apb2_parents[] = { "osc24M", "osc32k",
"pll-periph0", "iosc" };
static const struct ccu_mux_var_prediv ar100_r_apb2_predivs[] = {
{ .index = 2, .shift = 0, .width = 5 },
};
static struct ccu_div ar100_clk = {
.div = _SUNXI_CCU_DIV_FLAGS(8, 2, CLK_DIVIDER_POWER_OF_TWO),
.mux = {
.shift = 24,
.width = 2,
.var_predivs = ar100_r_apb2_predivs,
.n_var_predivs = ARRAY_SIZE(ar100_r_apb2_predivs),
},
.common = {
.reg = 0x000,
.features = CCU_FEATURE_VARIABLE_PREDIV,
.hw.init = CLK_HW_INIT_PARENTS("ar100",
ar100_r_apb2_parents,
&ccu_div_ops,
0),
},
};
static CLK_FIXED_FACTOR(r_ahb_clk, "r-ahb", "ar100", 1, 1, 0);
static struct ccu_div r_apb1_clk = {
.div = _SUNXI_CCU_DIV(0, 2),
.common = {
.reg = 0x00c,
.hw.init = CLK_HW_INIT("r-apb1",
"r-ahb",
&ccu_div_ops,
0),
},