linux-imx

/*

 * linux/arch/arm/mach-at91/at91rm9200_time.c

 *

 *  Copyright (C) 2003 SAN People

 *  Copyright (C) 2003 ATMEL

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License as published by

 * the Free Software Foundation; either version 2 of the License, or

 * (at your option) any later version.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 *

 * You should have received a copy of the GNU General Public License

 * along with this program; if not, write to the Free Software

 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA

 */

​

#include <linux/kernel.h>

#include <linux/interrupt.h>

#include <linux/irq.h>

#include <linux/clk.h>

#include <linux/clockchips.h>

#include <linux/export.h>

#include <linux/mfd/syscon.h>

#include <linux/mfd/syscon/atmel-st.h>

#include <linux/of_irq.h>

#include <linux/regmap.h>

​

static unsigned long last_crtr;

static u32 irqmask;

static struct clock_event_device clkevt;

static struct regmap *regmap_st;

static int timer_latch;

​

/*

 * The ST_CRTR is updated asynchronously to the master clock ... but

 * the updates as seen by the CPU don't seem to be strictly monotonic.

 * Waiting until we read the same value twice avoids glitching.

 */

static inline unsigned long read_CRTR(void)

{

    unsigned int x1, x2;

​

    regmap_read(regmap_st, AT91_ST_CRTR, &x1);

    do {

        regmap_read(regmap_st, AT91_ST_CRTR, &x2);

        if (x1 == x2)

            break;

        x1 = x2;

    } while (1);

    return x1;

}

​

/*

 * IRQ handler for the timer.

 */

static irqreturn_t at91rm9200_timer_interrupt(int irq, void *dev_id)

{

    u32 sr;

​

    regmap_read(regmap_st, AT91_ST_SR, &sr);

    sr &= irqmask;

​

    /*

     * irqs should be disabled here, but as the irq is shared they are only

     * guaranteed to be off if the timer irq is registered first.

     */

    WARN_ON_ONCE(!irqs_disabled());

​

    /* simulate "oneshot" timer with alarm */

    if (sr & AT91_ST_ALMS) {

        clkevt.event_handler(&clkevt);

        return IRQ_HANDLED;

    }

​

    /* periodic mode should handle delayed ticks */

    if (sr & AT91_ST_PITS) {

        u32 crtr = read_CRTR();

​

        while (((crtr - last_crtr) & AT91_ST_CRTV) >= timer_latch) {

            last_crtr += timer_latch;

            clkevt.event_handler(&clkevt);

        }

        return IRQ_HANDLED;

    }

​

    /* this irq is shared ... */

    return IRQ_NONE;