linux-imx

/*

 * arch/arm/mach-pxa/time.c

 *

 * PXA clocksource, clockevents, and OST interrupt handlers.

 * Copyright (c) 2007 by Bill Gatliff <bgat@billgatliff.com>.

 *

 * Derived from Nicolas Pitre's PXA timer handler Copyright (c) 2001

 * by MontaVista Software, Inc.  (Nico, your code rocks!)

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 */

​

#include <linux/kernel.h>

#include <linux/init.h>

#include <linux/interrupt.h>

#include <linux/clk.h>

#include <linux/clockchips.h>

#include <linux/of_address.h>

#include <linux/of_irq.h>

#include <linux/sched/clock.h>

#include <linux/sched_clock.h>

​

#include <clocksource/pxa.h>

​

#include <asm/div64.h>

​

#define OSMR0       0x00    /* OS Timer 0 Match Register */

#define OSMR1       0x04    /* OS Timer 1 Match Register */

#define OSMR2       0x08    /* OS Timer 2 Match Register */

#define OSMR3       0x0C    /* OS Timer 3 Match Register */

​

#define OSCR        0x10    /* OS Timer Counter Register */

#define OSSR        0x14    /* OS Timer Status Register */

#define OWER        0x18    /* OS Timer Watchdog Enable Register */

#define OIER        0x1C    /* OS Timer Interrupt Enable Register */

​

#define OSSR_M3     (1 << 3)    /* Match status channel 3 */

#define OSSR_M2     (1 << 2)    /* Match status channel 2 */

#define OSSR_M1     (1 << 1)    /* Match status channel 1 */

#define OSSR_M0     (1 << 0)    /* Match status channel 0 */

​

#define OIER_E0     (1 << 0)    /* Interrupt enable channel 0 */

​

/*

 * This is PXA's sched_clock implementation. This has a resolution

 * of at least 308 ns and a maximum value of 208 days.

 *

 * The return value is guaranteed to be monotonic in that range as

 * long as there is always less than 582 seconds between successive

 * calls to sched_clock() which should always be the case in practice.

 */

​

#define timer_readl(reg) readl_relaxed(timer_base + (reg))

#define timer_writel(val, reg) writel_relaxed((val), timer_base + (reg))

​

static void __iomem *timer_base;

​

static u64 notrace pxa_read_sched_clock(void)

{

    return timer_readl(OSCR);

}