linux-imx

/*

 * Copyright (C) 2010 Google, Inc.

 *

 * Author:

 *  Colin Cross <ccross@google.com>

 *

 * This software is licensed under the terms of the GNU General Public

 * License version 2, as published by the Free Software Foundation, and

 * may be copied, distributed, and modified under those terms.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 *

 */

​

#include <linux/clk.h>

#include <linux/clockchips.h>

#include <linux/cpu.h>

#include <linux/cpumask.h>

#include <linux/delay.h>

#include <linux/err.h>

#include <linux/interrupt.h>

#include <linux/of_address.h>

#include <linux/of_irq.h>

#include <linux/percpu.h>

#include <linux/sched_clock.h>

#include <linux/time.h>

​

#include "timer-of.h"

​

#ifdef CONFIG_ARM

#include <asm/mach/time.h>

#endif

​

#define RTC_SECONDS            0x08

#define RTC_SHADOW_SECONDS     0x0c

#define RTC_MILLISECONDS       0x10

​

#define TIMERUS_CNTR_1US 0x10

#define TIMERUS_USEC_CFG 0x14

#define TIMERUS_CNTR_FREEZE 0x4c

​

#define TIMER_PTV       0x0

#define TIMER_PTV_EN        BIT(31)

#define TIMER_PTV_PER       BIT(30)

#define TIMER_PCR       0x4

#define TIMER_PCR_INTR_CLR  BIT(30)

​

#ifdef CONFIG_ARM

#define TIMER_CPU0      0x50 /* TIMER3 */

#else

#define TIMER_CPU0      0x90 /* TIMER10 */

#define TIMER10_IRQ_IDX     10

#define IRQ_IDX_FOR_CPU(cpu)    (TIMER10_IRQ_IDX + cpu)

#endif

#define TIMER_BASE_FOR_CPU(cpu) (TIMER_CPU0 + (cpu) * 8)

​

static u32 usec_config;

static void __iomem *timer_reg_base;

#ifdef CONFIG_ARM

static void __iomem *rtc_base;

static struct timespec64 persistent_ts;

static u64 persistent_ms, last_persistent_ms;

static struct delay_timer tegra_delay_timer;

#endif

​

static int tegra_timer_set_next_event(unsigned long cycles,

                     struct clock_event_device *evt)

{

    void __iomem *reg_base = timer_of_base(to_timer_of(evt));

​

    writel(TIMER_PTV_EN |

           ((cycles > 1) ? (cycles - 1) : 0), /* n+1 scheme */

           reg_base + TIMER_PTV);

​

    return 0;

}

​

static int tegra_timer_shutdown(struct clock_event_device *evt)

{

    void __iomem *reg_base = timer_of_base(to_timer_of(evt));

​

    writel(0, reg_base + TIMER_PTV);

​

    return 0;

}

​

static int tegra_timer_set_periodic(struct clock_event_device *evt)

{

    void __iomem *reg_base = timer_of_base(to_timer_of(evt));