linux-imx

/*

 * CPPC (Collaborative Processor Performance Control) driver for

 * interfacing with the CPUfreq layer and governors. See

 * cppc_acpi.c for CPPC specific methods.

 *

 * (C) Copyright 2014, 2015 Linaro Ltd.

 * Author: Ashwin Chaugule <ashwin.chaugule@linaro.org>

 *

 * This program is free software; you can redistribute it and/or

 * modify it under the terms of the GNU General Public License

 * as published by the Free Software Foundation; version 2

 * of the License.

 */

​

#define pr_fmt(fmt) "CPPC Cpufreq:" fmt

​

#include <linux/kernel.h>

#include <linux/module.h>

#include <linux/delay.h>

#include <linux/cpu.h>

#include <linux/cpufreq.h>

#include <linux/dmi.h>

#include <linux/time.h>

#include <linux/vmalloc.h>

​

#include <asm/unaligned.h>

​

#include <acpi/cppc_acpi.h>

​

/* Minimum struct length needed for the DMI processor entry we want */

#define DMI_ENTRY_PROCESSOR_MIN_LENGTH  48

​

/* Offest in the DMI processor structure for the max frequency */

#define DMI_PROCESSOR_MAX_SPEED  0x14

​

/*

 * These structs contain information parsed from per CPU

 * ACPI _CPC structures.

 * e.g. For each CPU the highest, lowest supported

 * performance capabilities, desired performance level

 * requested etc.

 */

static struct cppc_cpudata **all_cpu_data;

​

struct cppc_workaround_oem_info {

    char oem_id[ACPI_OEM_ID_SIZE +1];

    char oem_table_id[ACPI_OEM_TABLE_ID_SIZE + 1];

    u32 oem_revision;

};

​

static bool apply_hisi_workaround;

​

static struct cppc_workaround_oem_info wa_info[] = {

    {

        .oem_id     = "HISI  ",

        .oem_table_id   = "HIP07   ",

        .oem_revision   = 0,

    }, {

        .oem_id     = "HISI  ",

        .oem_table_id   = "HIP08   ",

        .oem_revision   = 0,

    }

};