linux-imx

/*

 * Copyright (c) 2006-2008 Simtec Electronics

 *  http://armlinux.simtec.co.uk/

 *  Ben Dooks <ben@simtec.co.uk>

 *

 * S3C2410 CPU Frequency scaling

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

*/

​

#include <linux/init.h>

#include <linux/module.h>

#include <linux/interrupt.h>

#include <linux/ioport.h>

#include <linux/cpufreq.h>

#include <linux/device.h>

#include <linux/clk.h>

#include <linux/err.h>

#include <linux/io.h>

​

#include <asm/mach/arch.h>

#include <asm/mach/map.h>

​

#include <mach/regs-clock.h>

​

#include <plat/cpu.h>

#include <plat/cpu-freq-core.h>

​

/* Note, 2410A has an extra mode for 1:4:4 ratio, bit 2 of CLKDIV */

​

static void s3c2410_cpufreq_setdivs(struct s3c_cpufreq_config *cfg)

{

    u32 clkdiv = 0;

​

    if (cfg->divs.h_divisor == 2)

        clkdiv |= S3C2410_CLKDIVN_HDIVN;

​

    if (cfg->divs.p_divisor != cfg->divs.h_divisor)

        clkdiv |= S3C2410_CLKDIVN_PDIVN;

​

    __raw_writel(clkdiv, S3C2410_CLKDIVN);

}

​

static int s3c2410_cpufreq_calcdivs(struct s3c_cpufreq_config *cfg)

{

    unsigned long hclk, fclk, pclk;

    unsigned int hdiv, pdiv;

    unsigned long hclk_max;

​

    fclk = cfg->freq.fclk;

    hclk_max = cfg->max.hclk;

​

    cfg->freq.armclk = fclk;

​

    s3c_freq_dbg("%s: fclk is %lu, max hclk %lu\n",

              __func__, fclk, hclk_max);

​

    hdiv = (fclk > cfg->max.hclk) ? 2 : 1;

    hclk = fclk / hdiv;

​

    if (hclk > cfg->max.hclk) {