Source
printk(KERN_DEBUG "MDCNFG: %08x MDREFR: %08x MDCAS0: %08x MDCAS1: %08x MDCAS2: %08x\n",
/*
* linux/arch/arm/mach-sa1100/cpu-sa1110.c
*
* Copyright (C) 2001 Russell King
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Note: there are two erratas that apply to the SA1110 here:
* 7 - SDRAM auto-power-up failure (rev A0)
* 13 - Corruption of internal register reads/writes following
* SDRAM reads (rev A0, B0, B1)
*
* We ignore rev. A0 and B0 devices; I don't think they're worth supporting.
*
* The SDRAM type can be passed on the command line as cpu_sa1110.sdram=type
*/
struct sdram_params {
const char name[20];
u_char rows; /* bits */
u_char cas_latency; /* cycles */
u_char tck; /* clock cycle time (ns) */
u_char trcd; /* activate to r/w (ns) */
u_char trp; /* precharge to activate (ns) */
u_char twr; /* write recovery time (ns) */
u_short refresh; /* refresh time for array (us) */
};
struct sdram_info {
u_int mdcnfg;
u_int mdrefr;
u_int mdcas[3];
};
static struct sdram_params sdram_tbl[] __initdata = {
{ /* Toshiba TC59SM716 CL2 */
.name = "TC59SM716-CL2",
.rows = 12,
.tck = 10,
.trcd = 20,
.trp = 20,
.twr = 10,
.refresh = 64000,
.cas_latency = 2,
}, { /* Toshiba TC59SM716 CL3 */
.name = "TC59SM716-CL3",
.rows = 12,
.tck = 8,
.trcd = 20,
.trp = 20,
.twr = 8,
.refresh = 64000,
.cas_latency = 3,
}, { /* Samsung K4S641632D TC75 */
.name = "K4S641632D",
.rows = 14,
.tck = 9,
.trcd = 27,
.trp = 20,
.twr = 9,
.refresh = 64000,
.cas_latency = 3,
}, { /* Samsung K4S281632B-1H */
.name = "K4S281632B-1H",
.rows = 12,
.tck = 10,
.trp = 20,
.twr = 10,
.refresh = 64000,
.cas_latency = 3,
}, { /* Samsung KM416S4030CT */
.name = "KM416S4030CT",
.rows = 13,
.tck = 8,
.trcd = 24, /* 3 CLKs */