linux-imx

/* SPDX-License-Identifier: GPL-2.0 */

/* Copyright (C) 2012-2018 ARM Limited or its affiliates. */

​

#ifndef __CC_CRYS_KERNEL_H__

#define __CC_CRYS_KERNEL_H__

​

// --------------------------------------

// BLOCK: DSCRPTR

// --------------------------------------

#define CC_DSCRPTR_COMPLETION_COUNTER_REG_OFFSET    0xE00UL

#define CC_DSCRPTR_COMPLETION_COUNTER_COMPLETION_COUNTER_BIT_SHIFT  0x0UL

#define CC_DSCRPTR_COMPLETION_COUNTER_COMPLETION_COUNTER_BIT_SIZE   0x6UL

#define CC_DSCRPTR_COMPLETION_COUNTER_OVERFLOW_COUNTER_BIT_SHIFT    0x6UL

#define CC_DSCRPTR_COMPLETION_COUNTER_OVERFLOW_COUNTER_BIT_SIZE 0x1UL

#define CC_DSCRPTR_SW_RESET_REG_OFFSET  0xE40UL

#define CC_DSCRPTR_SW_RESET_VALUE_BIT_SHIFT 0x0UL

#define CC_DSCRPTR_SW_RESET_VALUE_BIT_SIZE  0x1UL

#define CC_DSCRPTR_QUEUE_SRAM_SIZE_REG_OFFSET   0xE60UL

#define CC_DSCRPTR_QUEUE_SRAM_SIZE_NUM_OF_DSCRPTR_BIT_SHIFT 0x0UL

#define CC_DSCRPTR_QUEUE_SRAM_SIZE_NUM_OF_DSCRPTR_BIT_SIZE  0xAUL

#define CC_DSCRPTR_QUEUE_SRAM_SIZE_DSCRPTR_SRAM_SIZE_BIT_SHIFT  0xAUL

#define CC_DSCRPTR_QUEUE_SRAM_SIZE_DSCRPTR_SRAM_SIZE_BIT_SIZE   0xCUL

#define CC_DSCRPTR_QUEUE_SRAM_SIZE_SRAM_SIZE_BIT_SHIFT  0x16UL

#define CC_DSCRPTR_QUEUE_SRAM_SIZE_SRAM_SIZE_BIT_SIZE   0x3UL

#define CC_DSCRPTR_SINGLE_ADDR_EN_REG_OFFSET    0xE64UL

#define CC_DSCRPTR_SINGLE_ADDR_EN_VALUE_BIT_SHIFT   0x0UL

#define CC_DSCRPTR_SINGLE_ADDR_EN_VALUE_BIT_SIZE    0x1UL

#define CC_DSCRPTR_MEASURE_CNTR_REG_OFFSET  0xE68UL

#define CC_DSCRPTR_MEASURE_CNTR_VALUE_BIT_SHIFT 0x0UL

#define CC_DSCRPTR_MEASURE_CNTR_VALUE_BIT_SIZE  0x20UL

#define CC_DSCRPTR_QUEUE_WORD0_REG_OFFSET   0xE80UL

#define CC_DSCRPTR_QUEUE_WORD0_VALUE_BIT_SHIFT  0x0UL

#define CC_DSCRPTR_QUEUE_WORD0_VALUE_BIT_SIZE   0x20UL

#define CC_DSCRPTR_QUEUE_WORD1_REG_OFFSET   0xE84UL

#define CC_DSCRPTR_QUEUE_WORD1_DIN_DMA_MODE_BIT_SHIFT   0x0UL

#define CC_DSCRPTR_QUEUE_WORD1_DIN_DMA_MODE_BIT_SIZE    0x2UL

#define CC_DSCRPTR_QUEUE_WORD1_DIN_SIZE_BIT_SHIFT   0x2UL

#define CC_DSCRPTR_QUEUE_WORD1_DIN_SIZE_BIT_SIZE    0x18UL

#define CC_DSCRPTR_QUEUE_WORD1_NS_BIT_BIT_SHIFT 0x1AUL

#define CC_DSCRPTR_QUEUE_WORD1_NS_BIT_BIT_SIZE  0x1UL

#define CC_DSCRPTR_QUEUE_WORD1_DIN_CONST_VALUE_BIT_SHIFT    0x1BUL

#define CC_DSCRPTR_QUEUE_WORD1_DIN_CONST_VALUE_BIT_SIZE 0x1UL

#define CC_DSCRPTR_QUEUE_WORD1_NOT_LAST_BIT_SHIFT   0x1CUL

#define CC_DSCRPTR_QUEUE_WORD1_NOT_LAST_BIT_SIZE    0x1UL

#define CC_DSCRPTR_QUEUE_WORD1_LOCK_QUEUE_BIT_SHIFT 0x1DUL

#define CC_DSCRPTR_QUEUE_WORD1_LOCK_QUEUE_BIT_SIZE  0x1UL

#define CC_DSCRPTR_QUEUE_WORD1_NOT_USED_BIT_SHIFT   0x1EUL

#define CC_DSCRPTR_QUEUE_WORD1_NOT_USED_BIT_SIZE    0x2UL

#define CC_DSCRPTR_QUEUE_WORD2_REG_OFFSET   0xE88UL

#define CC_DSCRPTR_QUEUE_WORD2_VALUE_BIT_SHIFT  0x0UL

#define CC_DSCRPTR_QUEUE_WORD2_VALUE_BIT_SIZE   0x20UL

#define CC_DSCRPTR_QUEUE_WORD3_REG_OFFSET   0xE8CUL

#define CC_DSCRPTR_QUEUE_WORD3_DOUT_DMA_MODE_BIT_SHIFT  0x0UL

#define CC_DSCRPTR_QUEUE_WORD3_DOUT_DMA_MODE_BIT_SIZE   0x2UL

#define CC_DSCRPTR_QUEUE_WORD3_DOUT_SIZE_BIT_SHIFT  0x2UL

#define CC_DSCRPTR_QUEUE_WORD3_DOUT_SIZE_BIT_SIZE   0x18UL

#define CC_DSCRPTR_QUEUE_WORD3_NS_BIT_BIT_SHIFT 0x1AUL

#define CC_DSCRPTR_QUEUE_WORD3_NS_BIT_BIT_SIZE  0x1UL

#define CC_DSCRPTR_QUEUE_WORD3_DOUT_LAST_IND_BIT_SHIFT  0x1BUL

#define CC_DSCRPTR_QUEUE_WORD3_DOUT_LAST_IND_BIT_SIZE   0x1UL

#define CC_DSCRPTR_QUEUE_WORD3_HASH_XOR_BIT_BIT_SHIFT   0x1DUL

#define CC_DSCRPTR_QUEUE_WORD3_HASH_XOR_BIT_BIT_SIZE    0x1UL

#define CC_DSCRPTR_QUEUE_WORD3_NOT_USED_BIT_SHIFT   0x1EUL

#define CC_DSCRPTR_QUEUE_WORD3_NOT_USED_BIT_SIZE    0x1UL

#define CC_DSCRPTR_QUEUE_WORD3_QUEUE_LAST_IND_BIT_SHIFT 0x1FUL

#define CC_DSCRPTR_QUEUE_WORD3_QUEUE_LAST_IND_BIT_SIZE  0x1UL

#define CC_DSCRPTR_QUEUE_WORD4_REG_OFFSET   0xE90UL

#define CC_DSCRPTR_QUEUE_WORD4_DATA_FLOW_MODE_BIT_SHIFT 0x0UL

#define CC_DSCRPTR_QUEUE_WORD4_DATA_FLOW_MODE_BIT_SIZE  0x6UL

#define CC_DSCRPTR_QUEUE_WORD4_AES_SEL_N_HASH_BIT_SHIFT 0x6UL

#define CC_DSCRPTR_QUEUE_WORD4_AES_SEL_N_HASH_BIT_SIZE  0x1UL

#define CC_DSCRPTR_QUEUE_WORD4_AES_XOR_CRYPTO_KEY_BIT_SHIFT 0x7UL

#define CC_DSCRPTR_QUEUE_WORD4_AES_XOR_CRYPTO_KEY_BIT_SIZE  0x1UL

#define CC_DSCRPTR_QUEUE_WORD4_ACK_NEEDED_BIT_SHIFT 0x8UL

#define CC_DSCRPTR_QUEUE_WORD4_ACK_NEEDED_BIT_SIZE  0x2UL

#define CC_DSCRPTR_QUEUE_WORD4_CIPHER_MODE_BIT_SHIFT    0xAUL

#define CC_DSCRPTR_QUEUE_WORD4_CIPHER_MODE_BIT_SIZE 0x4UL

#define CC_DSCRPTR_QUEUE_WORD4_CMAC_SIZE0_BIT_SHIFT 0xEUL

#define CC_DSCRPTR_QUEUE_WORD4_CMAC_SIZE0_BIT_SIZE  0x1UL

#define CC_DSCRPTR_QUEUE_WORD4_CIPHER_DO_BIT_SHIFT  0xFUL

#define CC_DSCRPTR_QUEUE_WORD4_CIPHER_DO_BIT_SIZE   0x2UL

#define CC_DSCRPTR_QUEUE_WORD4_CIPHER_CONF0_BIT_SHIFT   0x11UL

#define CC_DSCRPTR_QUEUE_WORD4_CIPHER_CONF0_BIT_SIZE    0x2UL

#define CC_DSCRPTR_QUEUE_WORD4_CIPHER_CONF1_BIT_SHIFT   0x13UL

#define CC_DSCRPTR_QUEUE_WORD4_CIPHER_CONF1_BIT_SIZE    0x1UL

#define CC_DSCRPTR_QUEUE_WORD4_CIPHER_CONF2_BIT_SHIFT   0x14UL

#define CC_DSCRPTR_QUEUE_WORD4_CIPHER_CONF2_BIT_SIZE    0x2UL

#define CC_DSCRPTR_QUEUE_WORD4_KEY_SIZE_BIT_SHIFT   0x16UL

#define CC_DSCRPTR_QUEUE_WORD4_KEY_SIZE_BIT_SIZE    0x2UL

#define CC_DSCRPTR_QUEUE_WORD4_SETUP_OPERATION_BIT_SHIFT    0x18UL

#define CC_DSCRPTR_QUEUE_WORD4_SETUP_OPERATION_BIT_SIZE 0x4UL

#define CC_DSCRPTR_QUEUE_WORD4_DIN_SRAM_ENDIANNESS_BIT_SHIFT    0x1CUL