linux-imx

/* 

 * Cryptographic API.

 *

 * Support for VIA PadLock hardware crypto engine.

 *

 * Copyright (c) 2004  Michal Ludvig <michal@logix.cz>

 *

 */

​

#include <crypto/algapi.h>

#include <crypto/aes.h>

#include <crypto/padlock.h>

#include <linux/module.h>

#include <linux/init.h>

#include <linux/types.h>

#include <linux/errno.h>

#include <linux/interrupt.h>

#include <linux/kernel.h>

#include <linux/percpu.h>

#include <linux/smp.h>

#include <linux/slab.h>

#include <asm/cpu_device_id.h>

#include <asm/byteorder.h>

#include <asm/processor.h>

#include <asm/fpu/api.h>

​

/*

 * Number of data blocks actually fetched for each xcrypt insn.

 * Processors with prefetch errata will fetch extra blocks.

 */

static unsigned int ecb_fetch_blocks = 2;

#define MAX_ECB_FETCH_BLOCKS (8)

#define ecb_fetch_bytes (ecb_fetch_blocks * AES_BLOCK_SIZE)

​

static unsigned int cbc_fetch_blocks = 1;

#define MAX_CBC_FETCH_BLOCKS (4)

#define cbc_fetch_bytes (cbc_fetch_blocks * AES_BLOCK_SIZE)

​

/* Control word. */

struct cword {

    unsigned int __attribute__ ((__packed__))

        rounds:4,

        algo:3,

        keygen:1,

        interm:1,

        encdec:1,

        ksize:2;

} __attribute__ ((__aligned__(PADLOCK_ALIGNMENT)));

​

/* Whenever making any changes to the following

 * structure *make sure* you keep E, d_data

 * and cword aligned on 16 Bytes boundaries and

 * the Hardware can access 16 * 16 bytes of E and d_data

 * (only the first 15 * 16 bytes matter but the HW reads

 * more).

 */

struct aes_ctx {

    u32 E[AES_MAX_KEYLENGTH_U32]

        __attribute__ ((__aligned__(PADLOCK_ALIGNMENT)));

    u32 d_data[AES_MAX_KEYLENGTH_U32]

        __attribute__ ((__aligned__(PADLOCK_ALIGNMENT)));

    struct {

        struct cword encrypt;

        struct cword decrypt;

    } cword;

    u32 *D;

};

​

static DEFINE_PER_CPU(struct cword *, paes_last_cword);

​

/* Tells whether the ACE is capable to generate

   the extended key for a given key_len. */

static inline int

aes_hw_extkey_available(uint8_t key_len)

{

    /* TODO: We should check the actual CPU model/stepping

             as it's possible that the capability will be

             added in the next CPU revisions. */

    if (key_len == 16)

        return 1;

    return 0;

}

​

static inline struct aes_ctx *aes_ctx_common(void *ctx)

{

    unsigned long addr = (unsigned long)ctx;

    unsigned long align = PADLOCK_ALIGNMENT;

​

    if (align <= crypto_tfm_ctx_alignment())

        align = 1;

    return (struct aes_ctx *)ALIGN(addr, align);

}