linux-imx

/*

 * sun4i-ss.h - hardware cryptographic accelerator for Allwinner A20 SoC

 *

 * Copyright (C) 2013-2015 Corentin LABBE <clabbe.montjoie@gmail.com>

 *

 * Support AES cipher with 128,192,256 bits keysize.

 * Support MD5 and SHA1 hash algorithms.

 * Support DES and 3DES

 *

 * You could find the datasheet in Documentation/arm/sunxi/README

 *

 * Licensed under the GPL-2.

 */

​

#include <linux/clk.h>

#include <linux/crypto.h>

#include <linux/io.h>

#include <linux/module.h>

#include <linux/of.h>

#include <linux/platform_device.h>

#include <linux/reset.h>

#include <crypto/scatterwalk.h>

#include <linux/scatterlist.h>

#include <linux/interrupt.h>

#include <linux/delay.h>

#include <crypto/md5.h>

#include <crypto/skcipher.h>

#include <crypto/sha.h>

#include <crypto/hash.h>

#include <crypto/internal/hash.h>

#include <crypto/internal/skcipher.h>

#include <crypto/aes.h>

#include <crypto/des.h>

#include <crypto/internal/rng.h>

#include <crypto/rng.h>

​

#define SS_CTL            0x00

#define SS_KEY0           0x04

#define SS_KEY1           0x08

#define SS_KEY2           0x0C

#define SS_KEY3           0x10

#define SS_KEY4           0x14

#define SS_KEY5           0x18

#define SS_KEY6           0x1C

#define SS_KEY7           0x20

​

#define SS_IV0            0x24

#define SS_IV1            0x28

#define SS_IV2            0x2C

#define SS_IV3            0x30

​

#define SS_FCSR           0x44

​

#define SS_MD0            0x4C

#define SS_MD1            0x50

#define SS_MD2            0x54

#define SS_MD3            0x58

#define SS_MD4            0x5C

​

#define SS_RXFIFO         0x200

#define SS_TXFIFO         0x204

​

/* SS_CTL configuration values */

​

/* PRNG generator mode - bit 15 */

#define SS_PRNG_ONESHOT     (0 << 15)

#define SS_PRNG_CONTINUE    (1 << 15)

​

/* IV mode for hash */

#define SS_IV_ARBITRARY     (1 << 14)

​

/* SS operation mode - bits 12-13 */

#define SS_ECB          (0 << 12)

#define SS_CBC          (1 << 12)

#define SS_CTS          (3 << 12)

​

/* Counter width for CNT mode - bits 10-11 */

#define SS_CNT_16BITS       (0 << 10)

#define SS_CNT_32BITS       (1 << 10)

#define SS_CNT_64BITS       (2 << 10)

​

/* Key size for AES - bits 8-9 */

#define SS_AES_128BITS      (0 << 8)

#define SS_AES_192BITS      (1 << 8)

#define SS_AES_256BITS      (2 << 8)

​

/* Operation direction - bit 7 */

#define SS_ENCRYPTION       (0 << 7)

#define SS_DECRYPTION       (1 << 7)

​

/* SS Method - bits 4-6 */

#define SS_OP_AES       (0 << 4)