linux-imx

/*

 * A devfreq driver for NVIDIA Tegra SoCs

 *

 * Copyright (c) 2014 NVIDIA CORPORATION. All rights reserved.

 * Copyright (C) 2014 Google, Inc

 *

 * This program is free software; you can redistribute it and/or modify it

 * under the terms and conditions of the GNU General Public License,

 * version 2, as published by the Free Software Foundation.

 *

 * This program is distributed in the hope it will be useful, but WITHOUT

 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for

 * more details.

 *

 * You should have received a copy of the GNU General Public License

 * along with this program. If not, see <http://www.gnu.org/licenses/>.

 *

 */

​

#include <linux/clk.h>

#include <linux/cpufreq.h>

#include <linux/devfreq.h>

#include <linux/interrupt.h>

#include <linux/io.h>

#include <linux/module.h>

#include <linux/mod_devicetable.h>

#include <linux/platform_device.h>

#include <linux/pm_opp.h>

#include <linux/reset.h>

​

#include "governor.h"

​

#define ACTMON_GLB_STATUS                   0x0

#define ACTMON_GLB_PERIOD_CTRL                  0x4

​

#define ACTMON_DEV_CTRL                     0x0

#define ACTMON_DEV_CTRL_K_VAL_SHIFT             10

#define ACTMON_DEV_CTRL_ENB_PERIODIC                BIT(18)

#define ACTMON_DEV_CTRL_AVG_BELOW_WMARK_EN          BIT(20)

#define ACTMON_DEV_CTRL_AVG_ABOVE_WMARK_EN          BIT(21)

#define ACTMON_DEV_CTRL_CONSECUTIVE_BELOW_WMARK_NUM_SHIFT   23

#define ACTMON_DEV_CTRL_CONSECUTIVE_ABOVE_WMARK_NUM_SHIFT   26

#define ACTMON_DEV_CTRL_CONSECUTIVE_BELOW_WMARK_EN      BIT(29)

#define ACTMON_DEV_CTRL_CONSECUTIVE_ABOVE_WMARK_EN      BIT(30)

#define ACTMON_DEV_CTRL_ENB                 BIT(31)

​

#define ACTMON_DEV_UPPER_WMARK                  0x4

#define ACTMON_DEV_LOWER_WMARK                  0x8

#define ACTMON_DEV_INIT_AVG                 0xc

#define ACTMON_DEV_AVG_UPPER_WMARK              0x10

#define ACTMON_DEV_AVG_LOWER_WMARK              0x14

#define ACTMON_DEV_COUNT_WEIGHT                 0x18

#define ACTMON_DEV_AVG_COUNT                    0x20

#define ACTMON_DEV_INTR_STATUS                  0x24

​

#define ACTMON_INTR_STATUS_CLEAR                0xffffffff

​

#define ACTMON_DEV_INTR_CONSECUTIVE_UPPER           BIT(31)

#define ACTMON_DEV_INTR_CONSECUTIVE_LOWER           BIT(30)

​

#define ACTMON_ABOVE_WMARK_WINDOW               1

#define ACTMON_BELOW_WMARK_WINDOW               3

#define ACTMON_BOOST_FREQ_STEP                  16000

​

/*

 * Activity counter is incremented every 256 memory transactions, and each

 * transaction takes 4 EMC clocks for Tegra124; So the COUNT_WEIGHT is

 * 4 * 256 = 1024.

 */

#define ACTMON_COUNT_WEIGHT                 0x400

​

/*

 * ACTMON_AVERAGE_WINDOW_LOG2: default value for @DEV_CTRL_K_VAL, which

 * translates to 2 ^ (K_VAL + 1). ex: 2 ^ (6 + 1) = 128

 */

#define ACTMON_AVERAGE_WINDOW_LOG2          6

#define ACTMON_SAMPLING_PERIOD              12 /* ms */

#define ACTMON_DEFAULT_AVG_BAND             6  /* 1/10 of % */

​

#define KHZ                         1000

​

/* Assume that the bus is saturated if the utilization is 25% */

#define BUS_SATURATION_RATIO                    25

​

/**

 * struct tegra_devfreq_device_config - configuration specific to an ACTMON

 * device

 *

 * Coefficients and thresholds are percentages unless otherwise noted

 */

struct tegra_devfreq_device_config {