linux-imx

/*

 * Topcliff PCH DMA controller driver

 * Copyright (c) 2010 Intel Corporation

 * Copyright (C) 2011 LAPIS Semiconductor Co., Ltd.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 */

​

#include <linux/dmaengine.h>

#include <linux/dma-mapping.h>

#include <linux/init.h>

#include <linux/pci.h>

#include <linux/slab.h>

#include <linux/interrupt.h>

#include <linux/module.h>

#include <linux/pch_dma.h>

​

#include "dmaengine.h"

​

#define DRV_NAME "pch-dma"

​

#define DMA_CTL0_DISABLE        0x0

#define DMA_CTL0_SG         0x1

#define DMA_CTL0_ONESHOT        0x2

#define DMA_CTL0_MODE_MASK_BITS     0x3

#define DMA_CTL0_DIR_SHIFT_BITS     2

#define DMA_CTL0_BITS_PER_CH        4

​

#define DMA_CTL2_START_SHIFT_BITS   8

#define DMA_CTL2_IRQ_ENABLE_MASK    ((1UL << DMA_CTL2_START_SHIFT_BITS) - 1)

​

#define DMA_STATUS_IDLE         0x0

#define DMA_STATUS_DESC_READ        0x1

#define DMA_STATUS_WAIT         0x2

#define DMA_STATUS_ACCESS       0x3

#define DMA_STATUS_BITS_PER_CH      2

#define DMA_STATUS_MASK_BITS        0x3

#define DMA_STATUS_SHIFT_BITS       16

#define DMA_STATUS_IRQ(x)       (0x1 << (x))

#define DMA_STATUS0_ERR(x)      (0x1 << ((x) + 8))

#define DMA_STATUS2_ERR(x)      (0x1 << (x))

​

#define DMA_DESC_WIDTH_SHIFT_BITS   12

#define DMA_DESC_WIDTH_1_BYTE       (0x3 << DMA_DESC_WIDTH_SHIFT_BITS)

#define DMA_DESC_WIDTH_2_BYTES      (0x2 << DMA_DESC_WIDTH_SHIFT_BITS)

#define DMA_DESC_WIDTH_4_BYTES      (0x0 << DMA_DESC_WIDTH_SHIFT_BITS)

#define DMA_DESC_MAX_COUNT_1_BYTE   0x3FF

#define DMA_DESC_MAX_COUNT_2_BYTES  0x3FF

#define DMA_DESC_MAX_COUNT_4_BYTES  0x7FF

#define DMA_DESC_END_WITHOUT_IRQ    0x0

#define DMA_DESC_END_WITH_IRQ       0x1

#define DMA_DESC_FOLLOW_WITHOUT_IRQ 0x2

#define DMA_DESC_FOLLOW_WITH_IRQ    0x3

​

#define MAX_CHAN_NR         12

​