linux-imx

/*

 * DMA controller driver for CSR SiRFprimaII

 *

 * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.

 *

 * Licensed under GPLv2 or later.

 */

​

#include <linux/module.h>

#include <linux/dmaengine.h>

#include <linux/dma-mapping.h>

#include <linux/pm_runtime.h>

#include <linux/interrupt.h>

#include <linux/io.h>

#include <linux/slab.h>

#include <linux/of_irq.h>

#include <linux/of_address.h>

#include <linux/of_device.h>

#include <linux/of_platform.h>

#include <linux/clk.h>

#include <linux/of_dma.h>

#include <linux/sirfsoc_dma.h>

​

#include "dmaengine.h"

​

#define SIRFSOC_DMA_VER_A7V1                    1

#define SIRFSOC_DMA_VER_A7V2                    2

#define SIRFSOC_DMA_VER_A6                      4

​

#define SIRFSOC_DMA_DESCRIPTORS                 16

#define SIRFSOC_DMA_CHANNELS                    16

#define SIRFSOC_DMA_TABLE_NUM                   256

​

#define SIRFSOC_DMA_CH_ADDR                     0x00

#define SIRFSOC_DMA_CH_XLEN                     0x04

#define SIRFSOC_DMA_CH_YLEN                     0x08

#define SIRFSOC_DMA_CH_CTRL                     0x0C

​

#define SIRFSOC_DMA_WIDTH_0                     0x100

#define SIRFSOC_DMA_CH_VALID                    0x140

#define SIRFSOC_DMA_CH_INT                      0x144

#define SIRFSOC_DMA_INT_EN                      0x148

#define SIRFSOC_DMA_INT_EN_CLR                  0x14C

#define SIRFSOC_DMA_CH_LOOP_CTRL                0x150

#define SIRFSOC_DMA_CH_LOOP_CTRL_CLR            0x154

#define SIRFSOC_DMA_WIDTH_ATLAS7                0x10

#define SIRFSOC_DMA_VALID_ATLAS7                0x14

#define SIRFSOC_DMA_INT_ATLAS7                  0x18

#define SIRFSOC_DMA_INT_EN_ATLAS7               0x1c

#define SIRFSOC_DMA_LOOP_CTRL_ATLAS7            0x20

#define SIRFSOC_DMA_CUR_DATA_ADDR               0x34

#define SIRFSOC_DMA_MUL_ATLAS7                  0x38

#define SIRFSOC_DMA_CH_LOOP_CTRL_ATLAS7         0x158

#define SIRFSOC_DMA_CH_LOOP_CTRL_CLR_ATLAS7     0x15C

#define SIRFSOC_DMA_IOBG_SCMD_EN        0x800

#define SIRFSOC_DMA_EARLY_RESP_SET      0x818

#define SIRFSOC_DMA_EARLY_RESP_CLR      0x81C

​

#define SIRFSOC_DMA_MODE_CTRL_BIT               4

#define SIRFSOC_DMA_DIR_CTRL_BIT                5

#define SIRFSOC_DMA_MODE_CTRL_BIT_ATLAS7        2

#define SIRFSOC_DMA_CHAIN_CTRL_BIT_ATLAS7       3

#define SIRFSOC_DMA_DIR_CTRL_BIT_ATLAS7         4