Source
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edac_dbg(0, "MC: Setting mci->edac_cap to EDAC_FLAG_NONE because i5000_init_csrows() returned nonzero value\n");
/*
* Intel 5000(P/V/X) class Memory Controllers kernel module
*
* This file may be distributed under the terms of the
* GNU General Public License.
*
* Written by Douglas Thompson Linux Networx (http://lnxi.com)
* norsk5@xmission.com
*
* This module is based on the following document:
*
* Intel 5000X Chipset Memory Controller Hub (MCH) - Datasheet
* http://developer.intel.com/design/chipsets/datashts/313070.htm
*
*/
/*
* Alter this version for the I5000 module when modifications are made
*/
/* Device 16,
* Function 0: System Address
* Function 1: Memory Branch Map, Control, Errors Register
* Function 2: FSB Error Registers
*
* All 3 functions of Device 16 (0,1,2) share the SAME DID
*/
/* OFFSETS for Function 0 */
/* OFFSETS for Function 1 */
/* Thermal and SPD or BFD errors */