linux-imx

/*

 * Driver for Pondicherry2 memory controller.

 *

 * Copyright (c) 2016, Intel Corporation.

 *

 * This program is free software; you can redistribute it and/or modify it

 * under the terms and conditions of the GNU General Public License,

 * version 2, as published by the Free Software Foundation.

 *

 * This program is distributed in the hope it will be useful, but WITHOUT

 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for

 * more details.

 *

 * [Derived from sb_edac.c]

 *

 * Translation of system physical addresses to DIMM addresses

 * is a two stage process:

 *

 * First the Pondicherry 2 memory controller handles slice and channel interleaving

 * in "sys2pmi()". This is (almost) completley common between platforms.

 *

 * Then a platform specific dunit (DIMM unit) completes the process to provide DIMM,

 * rank, bank, row and column using the appropriate "dunit_ops" functions/parameters.

 */

​

#include <linux/module.h>

#include <linux/init.h>

#include <linux/pci.h>

#include <linux/pci_ids.h>

#include <linux/slab.h>

#include <linux/delay.h>

#include <linux/edac.h>

#include <linux/mmzone.h>

#include <linux/smp.h>

#include <linux/bitmap.h>

#include <linux/math64.h>

#include <linux/mod_devicetable.h>

#include <asm/cpu_device_id.h>

#include <asm/intel-family.h>

#include <asm/processor.h>

#include <asm/mce.h>

​

#include "edac_mc.h"

#include "edac_module.h"

#include "pnd2_edac.h"

​

#define EDAC_MOD_STR        "pnd2_edac"

​

#define APL_NUM_CHANNELS    4

#define DNV_NUM_CHANNELS    2

#define DNV_MAX_DIMMS       2 /* Max DIMMs per channel */

​

enum type {

    APL,

    DNV, /* All requests go to PMI CH0 on each slice (CH1 disabled) */

};

​

struct dram_addr {

    int chan;

    int dimm;

    int rank;

    int bank;