linux-imx

// SPDX-License-Identifier: GPL-2.0-or-later

/*

 * init_ohci1394_dma.c - Initializes physical DMA on all OHCI 1394 controllers

 *

 * Copyright (C) 2006-2007      Bernhard Kaindl <bk@suse.de>

 *

 * Derived from drivers/ieee1394/ohci1394.c and arch/x86/kernel/early-quirks.c

 * this file has functions to:

 * - scan the PCI very early on boot for all OHCI 1394-compliant controllers

 * - reset and initialize them and make them join the IEEE1394 bus and

 * - enable physical DMA on them to allow remote debugging

 *

 * All code and data is marked as __init and __initdata, respective as

 * during boot, all OHCI1394 controllers may be claimed by the firewire

 * stack and at this point, this code should not touch them anymore.

 *

 * To use physical DMA after the initialization of the firewire stack,

 * be sure that the stack enables it and (re-)attach after the bus reset

 * which may be caused by the firewire stack initialization.

 */

​

#include <linux/delay.h>

#include <linux/io.h>

#include <linux/kernel.h>

#include <linux/pci.h>      /* for PCI defines */

#include <linux/string.h>

​

#include <asm/pci-direct.h> /* for direct PCI config space access */

#include <asm/fixmap.h>

​

#include <linux/init_ohci1394_dma.h>

#include "ohci.h"

​

int __initdata init_ohci1394_dma_early;

​

struct ohci {

    void __iomem *registers;

};

​

static inline void reg_write(const struct ohci *ohci, int offset, u32 data)

{

    writel(data, ohci->registers + offset);

}

​

static inline u32 reg_read(const struct ohci *ohci, int offset)

{

    return readl(ohci->registers + offset);

}

​

#define OHCI_LOOP_COUNT     100 /* Number of loops for reg read waits */

​

/* Reads a PHY register of an OHCI-1394 controller */

static inline u8 __init get_phy_reg(struct ohci *ohci, u8 addr)

{

    int i;

    u32 r;

​

    reg_write(ohci, OHCI1394_PhyControl, (addr << 8) | 0x00008000);

​

    for (i = 0; i < OHCI_LOOP_COUNT; i++) {

        if (reg_read(ohci, OHCI1394_PhyControl) & 0x80000000)

            break;

        mdelay(1);