linux-imx

/*

 * Copyright (C) 2013 Altera Corporation

 * Based on gpio-mpc8xxx.c

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License as published by

 * the Free Software Foundation; either version 2 of the License, or

 * (at your option) any later version.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 *

 * You should have received a copy of the GNU General Public License

 * along with this program.  If not, see <http://www.gnu.org/licenses/>.

 */

​

#include <linux/io.h>

#include <linux/module.h>

#include <linux/gpio/driver.h>

#include <linux/of_gpio.h> /* For of_mm_gpio_chip */

#include <linux/platform_device.h>

​

#define ALTERA_GPIO_MAX_NGPIO       32

#define ALTERA_GPIO_DATA        0x0

#define ALTERA_GPIO_DIR         0x4

#define ALTERA_GPIO_IRQ_MASK        0x8

#define ALTERA_GPIO_EDGE_CAP        0xc

​

/**

* struct altera_gpio_chip

* @mmchip       : memory mapped chip structure.

* @gpio_lock        : synchronization lock so that new irq/set/get requests

*             will be blocked until the current one completes.

* @interrupt_trigger    : specifies the hardware configured IRQ trigger type

*             (rising, falling, both, high)

* @mapped_irq       : kernel mapped irq number.

*/

struct altera_gpio_chip {

    struct of_mm_gpio_chip mmchip;

    raw_spinlock_t gpio_lock;

    int interrupt_trigger;

    int mapped_irq;

};

​

static void altera_gpio_irq_unmask(struct irq_data *d)

{

    struct altera_gpio_chip *altera_gc;

    struct of_mm_gpio_chip *mm_gc;

    unsigned long flags;

    u32 intmask;

​

    altera_gc = gpiochip_get_data(irq_data_get_irq_chip_data(d));

    mm_gc = &altera_gc->mmchip;

​

    raw_spin_lock_irqsave(&altera_gc->gpio_lock, flags);

    intmask = readl(mm_gc->regs + ALTERA_GPIO_IRQ_MASK);

    /* Set ALTERA_GPIO_IRQ_MASK bit to unmask */

    intmask |= BIT(irqd_to_hwirq(d));

    writel(intmask, mm_gc->regs + ALTERA_GPIO_IRQ_MASK);

    raw_spin_unlock_irqrestore(&altera_gc->gpio_lock, flags);

}

​

static void altera_gpio_irq_mask(struct irq_data *d)

{

    struct altera_gpio_chip *altera_gc;

    struct of_mm_gpio_chip *mm_gc;

    unsigned long flags;

    u32 intmask;

​

    altera_gc = gpiochip_get_data(irq_data_get_irq_chip_data(d));

    mm_gc = &altera_gc->mmchip;

​

    raw_spin_lock_irqsave(&altera_gc->gpio_lock, flags);

    intmask = readl(mm_gc->regs + ALTERA_GPIO_IRQ_MASK);

    /* Clear ALTERA_GPIO_IRQ_MASK bit to mask */

    intmask &= ~BIT(irqd_to_hwirq(d));

    writel(intmask, mm_gc->regs + ALTERA_GPIO_IRQ_MASK);

    raw_spin_unlock_irqrestore(&altera_gc->gpio_lock, flags);

}

​

/**

 * This controller's IRQ type is synthesized in hardware, so this function

 * just checks if the requested set_type matches the synthesized IRQ type

 */

static int altera_gpio_irq_set_type(struct irq_data *d,

                   unsigned int type)

{

    struct altera_gpio_chip *altera_gc;

​

    altera_gc = gpiochip_get_data(irq_data_get_irq_chip_data(d));