linux-imx

/*

 * Copyright 2015 IBM Corp.

 *

 * Joel Stanley <joel@jms.id.au>

 *

 * This program is free software; you can redistribute it and/or

 * modify it under the terms of the GNU General Public License

 * as published by the Free Software Foundation; either version

 * 2 of the License, or (at your option) any later version.

 */

​

#include <asm/div64.h>

#include <linux/clk.h>

#include <linux/gpio/driver.h>

#include <linux/gpio/aspeed.h>

#include <linux/hashtable.h>

#include <linux/init.h>

#include <linux/io.h>

#include <linux/kernel.h>

#include <linux/module.h>

#include <linux/pinctrl/consumer.h>

#include <linux/platform_device.h>

#include <linux/spinlock.h>

#include <linux/string.h>

​

/*

 * These two headers aren't meant to be used by GPIO drivers. We need

 * them in order to access gpio_chip_hwgpio() which we need to implement

 * the aspeed specific API which allows the coprocessor to request

 * access to some GPIOs and to arbitrate between coprocessor and ARM.

 */

#include <linux/gpio/consumer.h>

#include "gpiolib.h"

​

struct aspeed_bank_props {

    unsigned int bank;

    u32 input;

    u32 output;

};

​

struct aspeed_gpio_config {

    unsigned int nr_gpios;

    const struct aspeed_bank_props *props;

};

​

/*

 * @offset_timer: Maps an offset to an @timer_users index, or zero if disabled

 * @timer_users: Tracks the number of users for each timer

 *

 * The @timer_users has four elements but the first element is unused. This is

 * to simplify accounting and indexing, as a zero value in @offset_timer

 * represents disabled debouncing for the GPIO. Any other value for an element

 * of @offset_timer is used as an index into @timer_users. This behaviour of

 * the zero value aligns with the behaviour of zero built from the timer

 * configuration registers (i.e. debouncing is disabled).

 */

struct aspeed_gpio {

    struct gpio_chip chip;

    spinlock_t lock;

    void __iomem *base;

    int irq;

    const struct aspeed_gpio_config *config;

​

    u8 *offset_timer;

    unsigned int timer_users[4];

    struct clk *clk;

​

    u32 *dcache;

    u8 *cf_copro_bankmap;

};

​

struct aspeed_gpio_bank {

    uint16_t    val_regs;   /* +0: Rd: read input value, Wr: set write latch

                     * +4: Rd/Wr: Direction (0=in, 1=out)

                     */

    uint16_t    rdata_reg;  /*     Rd: read write latch, Wr: <none>  */

    uint16_t    irq_regs;

    uint16_t    debounce_regs;

    uint16_t    tolerance_regs;

    uint16_t    cmdsrc_regs;

    const char  names[4][3];

};

​

/*

 * Note: The "value" register returns the input value sampled on the

 *       line even when the GPIO is configured as an output. Since

 *       that input goes through synchronizers, writing, then reading

 *       back may not return the written value right away.

 *

 *       The "rdata" register returns the content of the write latch

 *       and thus can be used to read back what was last written

 *       reliably.