linux-imx

// SPDX-License-Identifier: GPL-2.0

/*

 * Generic EP93xx GPIO handling

 *

 * Copyright (c) 2008 Ryan Mallon

 * Copyright (c) 2011 H Hartley Sweeten <hsweeten@visionengravers.com>

 *

 * Based on code originally from:

 *  linux/arch/arm/mach-ep93xx/core.c

 */

​

#include <linux/init.h>

#include <linux/module.h>

#include <linux/platform_device.h>

#include <linux/io.h>

#include <linux/irq.h>

#include <linux/slab.h>

#include <linux/gpio/driver.h>

#include <linux/bitops.h>

​

#define EP93XX_GPIO_F_INT_STATUS 0x5c

#define EP93XX_GPIO_A_INT_STATUS 0xa0

#define EP93XX_GPIO_B_INT_STATUS 0xbc

​

/* Maximum value for gpio line identifiers */

#define EP93XX_GPIO_LINE_MAX 63

​

/* Maximum value for irq capable line identifiers */

#define EP93XX_GPIO_LINE_MAX_IRQ 23

​

/*

 * Static mapping of GPIO bank F IRQS:

 * F0..F7 (16..24) to irq 80..87.

 */

#define EP93XX_GPIO_F_IRQ_BASE 80

​

struct ep93xx_gpio {

    void __iomem        *base;

    struct gpio_chip    gc[8];

};

​

/*************************************************************************

 * Interrupt handling for EP93xx on-chip GPIOs

 *************************************************************************/

static unsigned char gpio_int_unmasked[3];

static unsigned char gpio_int_enabled[3];

static unsigned char gpio_int_type1[3];

static unsigned char gpio_int_type2[3];

static unsigned char gpio_int_debounce[3];

​

/* Port ordering is: A B F */

static const u8 int_type1_register_offset[3]    = { 0x90, 0xac, 0x4c };

static const u8 int_type2_register_offset[3]    = { 0x94, 0xb0, 0x50 };

static const u8 eoi_register_offset[3]      = { 0x98, 0xb4, 0x54 };

static const u8 int_en_register_offset[3]   = { 0x9c, 0xb8, 0x58 };

static const u8 int_debounce_register_offset[3] = { 0xa8, 0xc4, 0x64 };

​

static void ep93xx_gpio_update_int_params(struct ep93xx_gpio *epg, unsigned port)

{

    BUG_ON(port > 2);

​

    writeb_relaxed(0, epg->base + int_en_register_offset[port]);

​