linux-imx

// SPDX-License-Identifier: GPL-2.0

/*

 * SAMA5D2 PIOBU GPIO controller

 *

 * Copyright (C) 2018 Microchip Technology Inc. and its subsidiaries

 *

 * Author: Andrei Stefanescu <andrei.stefanescu@microchip.com>

 *

 */

#include <linux/bits.h>

#include <linux/gpio/driver.h>

#include <linux/init.h>

#include <linux/kernel.h>

#include <linux/mfd/syscon.h>

#include <linux/module.h>

#include <linux/of.h>

#include <linux/platform_device.h>

#include <linux/regmap.h>

​

#define PIOBU_NUM 8

#define PIOBU_REG_SIZE 4

​

/*

 * backup mode protection register for tamper detection

 * normal mode protection register for tamper detection

 * wakeup signal generation

 */

#define PIOBU_BMPR 0x7C

#define PIOBU_NMPR 0x80

#define PIOBU_WKPR 0x90

​

#define PIOBU_BASE 0x18 /* PIOBU offset from SECUMOD base register address. */

​

#define PIOBU_DET_OFFSET 16

​

/* In the datasheet this bit is called OUTPUT */

#define PIOBU_DIRECTION BIT(8)

#define PIOBU_OUT BIT(8)

#define PIOBU_IN 0

​

#define PIOBU_SOD BIT(9)

#define PIOBU_PDS BIT(10)

​

#define PIOBU_HIGH BIT(9)

#define PIOBU_LOW 0

​

struct sama5d2_piobu {

    struct gpio_chip chip;

    struct regmap *regmap;

};

​

/**

 * sama5d2_piobu_setup_pin() - prepares a pin for set_direction call

 *

 * Do not consider pin for tamper detection (normal and backup modes)

 * Do not consider pin as tamper wakeup interrupt source

 */

static int sama5d2_piobu_setup_pin(struct gpio_chip *chip, unsigned int pin)

{

    int ret;

    struct sama5d2_piobu *piobu = container_of(chip, struct sama5d2_piobu,

                           chip);

    unsigned int mask = BIT(PIOBU_DET_OFFSET + pin);

​

    ret = regmap_update_bits(piobu->regmap, PIOBU_BMPR, mask, 0);

    if (ret)

        return ret;

​

    ret = regmap_update_bits(piobu->regmap, PIOBU_NMPR, mask, 0);

    if (ret)

        return ret;

​

    return regmap_update_bits(piobu->regmap, PIOBU_WKPR, mask, 0);

}

​

/**

 * sama5d2_piobu_write_value() - writes value & mask at the pin's PIOBU register

 */

static int sama5d2_piobu_write_value(struct gpio_chip *chip, unsigned int pin,

                     unsigned int mask, unsigned int value)

{

    int reg;

    struct sama5d2_piobu *piobu = container_of(chip, struct sama5d2_piobu,

                           chip);

​

    reg = PIOBU_BASE + pin * PIOBU_REG_SIZE;

​

    return regmap_update_bits(piobu->regmap, reg, mask, value);

}

​

/**

 * sama5d2_piobu_read_value() - read the value with masking from the pin's PIOBU