Source
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ret = of_property_read_u32(pdev->dev.of_node, "intel,muxctl", &mux_val);
// SPDX-License-Identifier: GPL-2.0
/*
* GPIO interface for Intel Sodaville SoCs.
*
* Copyright (c) 2010, 2011 Intel Corporation
*
* Author: Hans J. Koch <hjk@linutronix.de>
*/
struct sdv_gpio_chip_data {
int irq_base;
void __iomem *gpio_pub_base;
struct irq_domain *id;
struct irq_chip_generic *gc;
struct gpio_chip chip;
};
static int sdv_gpio_pub_set_type(struct irq_data *d, unsigned int type)
{
struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
struct sdv_gpio_chip_data *sd = gc->private;
void __iomem *type_reg;
u32 reg;
if (d->hwirq < 8)
type_reg = sd->gpio_pub_base + GPIT1R0;
else
type_reg = sd->gpio_pub_base + GPIT1R1;
reg = readl(type_reg);
switch (type) {
case IRQ_TYPE_LEVEL_HIGH:
reg &= ~BIT(4 * (d->hwirq % 8));
break;
case IRQ_TYPE_LEVEL_LOW:
reg |= BIT(4 * (d->hwirq % 8));
break;
default:
return -EINVAL;
}
writel(reg, type_reg);
return 0;
}
static irqreturn_t sdv_gpio_pub_irq_handler(int irq, void *data)
{
struct sdv_gpio_chip_data *sd = data;
unsigned long irq_stat = readl(sd->gpio_pub_base + GPSTR);
int irq_bit;
irq_stat &= readl(sd->gpio_pub_base + GPIO_INT);
if (!irq_stat)
return IRQ_NONE;
for_each_set_bit(irq_bit, &irq_stat, 32)
generic_handle_irq(irq_find_mapping(sd->id, irq_bit));
return IRQ_HANDLED;
}
static int sdv_xlate(struct irq_domain *h, struct device_node *node,