linux-imx

/*

 * Copyright (C) ST-Ericsson SA 2010

 *

 * License Terms: GNU General Public License, version 2

 * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson

 */

​

#include <linux/init.h>

#include <linux/platform_device.h>

#include <linux/slab.h>

#include <linux/gpio/driver.h>

#include <linux/interrupt.h>

#include <linux/of.h>

#include <linux/mfd/stmpe.h>

#include <linux/seq_file.h>

#include <linux/bitops.h>

​

/*

 * These registers are modified under the irq bus lock and cached to avoid

 * unnecessary writes in bus_sync_unlock.

 */

enum { REG_RE, REG_FE, REG_IE };

​

enum { LSB, CSB, MSB };

​

#define CACHE_NR_REGS   3

/* No variant has more than 24 GPIOs */

#define CACHE_NR_BANKS  (24 / 8)

​

struct stmpe_gpio {

    struct gpio_chip chip;

    struct stmpe *stmpe;

    struct device *dev;

    struct mutex irq_lock;

    u32 norequest_mask;

    /* Caches of interrupt control registers for bus_lock */

    u8 regs[CACHE_NR_REGS][CACHE_NR_BANKS];

    u8 oldregs[CACHE_NR_REGS][CACHE_NR_BANKS];

};

​

static int stmpe_gpio_get(struct gpio_chip *chip, unsigned offset)

{

    struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(chip);

    struct stmpe *stmpe = stmpe_gpio->stmpe;

    u8 reg = stmpe->regs[STMPE_IDX_GPMR_LSB + (offset / 8)];

    u8 mask = BIT(offset % 8);

    int ret;

​

    ret = stmpe_reg_read(stmpe, reg);

    if (ret < 0)

        return ret;

​

    return !!(ret & mask);

}

​

static void stmpe_gpio_set(struct gpio_chip *chip, unsigned offset, int val)

{

    struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(chip);

    struct stmpe *stmpe = stmpe_gpio->stmpe;

    int which = val ? STMPE_IDX_GPSR_LSB : STMPE_IDX_GPCR_LSB;

    u8 reg = stmpe->regs[which + (offset / 8)];

    u8 mask = BIT(offset % 8);

​

    /*

     * Some variants have single register for gpio set/clear functionality.

     * For them we need to write 0 to clear and 1 to set.

     */

    if (stmpe->regs[STMPE_IDX_GPSR_LSB] == stmpe->regs[STMPE_IDX_GPCR_LSB])

        stmpe_set_bits(stmpe, reg, mask, val ? mask : 0);

    else

        stmpe_reg_write(stmpe, reg, mask);

}

​

static int stmpe_gpio_get_direction(struct gpio_chip *chip,

                    unsigned offset)

{

    struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(chip);

    struct stmpe *stmpe = stmpe_gpio->stmpe;

    u8 reg = stmpe->regs[STMPE_IDX_GPDR_LSB] - (offset / 8);

    u8 mask = BIT(offset % 8);

    int ret;

​

    ret = stmpe_reg_read(stmpe, reg);

    if (ret < 0)

        return ret;

​

    return !(ret & mask);

}

​

static int stmpe_gpio_direction_output(struct gpio_chip *chip,

                     unsigned offset, int val)

{