linux-imx

/*

 *  This program is free software; you can redistribute it and/or modify it

 *  under the terms of the GNU General Public License version 2 as published

 *  by the Free Software Foundation.

 *

 *  Copyright (C) 2012 John Crispin <john@phrozen.org>

 *

 */

​

#include <linux/slab.h>

#include <linux/init.h>

#include <linux/module.h>

#include <linux/types.h>

#include <linux/of_platform.h>

#include <linux/mutex.h>

#include <linux/gpio/driver.h>

#include <linux/io.h>

#include <linux/clk.h>

#include <linux/err.h>

​

#include <lantiq_soc.h>

​

/*

 * The Serial To Parallel (STP) is found on MIPS based Lantiq socs. It is a

 * peripheral controller used to drive external shift register cascades. At most

 * 3 groups of 8 bits can be driven. The hardware is able to allow the DSL modem

 * to drive the 2 LSBs of the cascade automatically.

 */

​

/* control register 0 */

#define XWAY_STP_CON0       0x00

/* control register 1 */

#define XWAY_STP_CON1       0x04

/* data register 0 */

#define XWAY_STP_CPU0       0x08

/* data register 1 */

#define XWAY_STP_CPU1       0x0C

/* access register */

#define XWAY_STP_AR     0x10

​

/* software or hardware update select bit */

#define XWAY_STP_CON_SWU    BIT(31)

​

/* automatic update rates */

#define XWAY_STP_2HZ        0

#define XWAY_STP_4HZ        BIT(23)

#define XWAY_STP_8HZ        BIT(24)

#define XWAY_STP_10HZ       (BIT(24) | BIT(23))

#define XWAY_STP_SPEED_MASK (0xf << 23)

​

/* clock source for automatic update */

#define XWAY_STP_UPD_FPI    BIT(31)

#define XWAY_STP_UPD_MASK   (BIT(31) | BIT(30))

​

/* let the adsl core drive the 2 LSBs */

#define XWAY_STP_ADSL_SHIFT 24

#define XWAY_STP_ADSL_MASK  0x3

​

/* 2 groups of 3 bits can be driven by the phys */

#define XWAY_STP_PHY_MASK   0x7

#define XWAY_STP_PHY1_SHIFT 27

#define XWAY_STP_PHY2_SHIFT 15

​