linux-imx

/*

 * AppliedMicro X-Gene SoC GPIO-Standby Driver

 *

 * Copyright (c) 2014, Applied Micro Circuits Corporation

 * Author:  Tin Huynh <tnhuynh@apm.com>.

 *      Y Vo <yvo@apm.com>.

 *      Quan Nguyen <qnguyen@apm.com>.

 *

 * This program is free software; you can redistribute  it and/or modify it

 * under  the terms of  the GNU General  Public License as published by the

 * Free Software Foundation;  either version 2 of the  License, or (at your

 * option) any later version.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 *

 * You should have received a copy of the GNU General Public License

 * along with this program.  If not, see <http://www.gnu.org/licenses/>.

 */

​

#include <linux/module.h>

#include <linux/io.h>

#include <linux/platform_device.h>

#include <linux/of_gpio.h>

#include <linux/gpio/driver.h>

#include <linux/acpi.h>

​

#include "gpiolib.h"

​

/* Common property names */

#define XGENE_NIRQ_PROPERTY     "apm,nr-irqs"

#define XGENE_NGPIO_PROPERTY        "apm,nr-gpios"

#define XGENE_IRQ_START_PROPERTY    "apm,irq-start"

​

#define XGENE_DFLT_MAX_NGPIO        22

#define XGENE_DFLT_MAX_NIRQ     6

#define XGENE_DFLT_IRQ_START_PIN    8

#define GPIO_MASK(x)            (1U << ((x) % 32))

​

#define MPA_GPIO_INT_LVL        0x0290

#define MPA_GPIO_OE_ADDR        0x029c

#define MPA_GPIO_OUT_ADDR       0x02a0

#define MPA_GPIO_IN_ADDR        0x02a4

#define MPA_GPIO_SEL_LO         0x0294

​

#define GPIO_INT_LEVEL_H    0x000001

#define GPIO_INT_LEVEL_L    0x000000

​

/**

 * struct xgene_gpio_sb - GPIO-Standby private data structure.

 * @gc:             memory-mapped GPIO controllers.

 * @regs:           GPIO register base offset

 * @irq_domain:         GPIO interrupt domain

 * @irq_start:          GPIO pin that start support interrupt

 * @nirq:           Number of GPIO pins that supports interrupt

 * @parent_irq_base:        Start parent HWIRQ

 */

struct xgene_gpio_sb {

    struct gpio_chip    gc;

    void __iomem        *regs;

    struct irq_domain   *irq_domain;