Source
x
leftover = schedule_timeout_interruptible(msecs_to_jiffies(data->power_period));
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* fam15h_power.c - AMD Family 15h processor power monitoring
*
* Copyright (c) 2011-2016 Advanced Micro Devices, Inc.
* Author: Andreas Herrmann <herrmann.der.user@googlemail.com>
*/
MODULE_DESCRIPTION("AMD Family 15h CPU processor power monitor");
MODULE_AUTHOR("Andreas Herrmann <herrmann.der.user@googlemail.com>");
MODULE_LICENSE("GPL");
/* D18F3 */
/* D18F4 */
/* D18F5 */
/* set maximum interval as 1 second */
struct fam15h_power_data {
struct pci_dev *pdev;
unsigned int tdp_to_watts;
unsigned int base_tdp;
unsigned int processor_pwr_watts;
unsigned int cpu_pwr_sample_ratio;
const struct attribute_group *groups[FAM15H_NUM_GROUPS];
struct attribute_group group;
/* maximum accumulated power of a compute unit */
u64 max_cu_acc_power;
/* accumulated power of the compute units */
u64 cu_acc_power[MAX_CUS];
/* performance timestamp counter */
u64 cpu_sw_pwr_ptsc[MAX_CUS];
/* online/offline status of current compute unit */
int cu_on[MAX_CUS];
unsigned long power_period;
};
static bool is_carrizo_or_later(void)
{
return boot_cpu_data.x86 == 0x15 && boot_cpu_data.x86_model >= 0x60;
}
static ssize_t power1_input_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
u32 val, tdp_limit, running_avg_range;
s32 running_avg_capture;
u64 curr_pwr_watts;
struct fam15h_power_data *data = dev_get_drvdata(dev);
struct pci_dev *f4 = data->pdev;
pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 5),
REG_TDP_RUNNING_AVERAGE, &val);
/*
* On Carrizo and later platforms, TdpRunAvgAccCap bit field
* is extended to 4:31 from 4:25.
*/
if (is_carrizo_or_later()) {
running_avg_capture = val >> 4;
running_avg_capture = sign_extend32(running_avg_capture, 27);