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/* * hwmon-vid.c - VID/VRM/VRD voltage conversions * * Copyright (c) 2004 Rudolf Marek <r.marek@assembler.cz> * * Partly imported from i2c-vid.h of the lm_sensors project * Copyright (c) 2002 Mark D. Studebaker <mdsxyz123@yahoo.com> * With assistance from Trent Piepho <xyzzy@speakeasy.org> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. *//* * Common code for decoding VID pins. * * References: * * For VRM 8.4 to 9.1, "VRM x.y DC-DC Converter Design Guidelines", * available at http://developer.intel.com/. * * For VRD 10.0 and up, "VRD x.y Design Guide", * available at http://developer.intel.com/. * * AMD Athlon 64 and AMD Opteron Processors, AMD Publication 26094, * http://support.amd.com/us/Processor_TechDocs/26094.PDF * Table 74. VID Code Voltages * This corresponds to an arbitrary VRM code of 24 in the functions below. * These CPU models (K8 revision <= E) have 5 VID pins. See also: * Revision Guide for AMD Athlon 64 and AMD Opteron Processors, AMD Publication 25759, * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/25759.pdf * * AMD NPT Family 0Fh Processors, AMD Publication 32559, * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/32559.pdf * Table 71. VID Code Voltages * This corresponds to an arbitrary VRM code of 25 in the functions below. * These CPU models (K8 revision >= F) have 6 VID pins. See also: * Revision Guide for AMD NPT Family 0Fh Processors, AMD Publication 33610, * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/33610.pdf * * The 17 specification is in fact Intel Mobile Voltage Positioning - * (IMVP-II). You can find more information in the datasheet of Max1718 * http://www.maxim-ic.com/quick_view2.cfm/qv_pk/2452 * * The 13 specification corresponds to the Intel Pentium M series. There * doesn't seem to be any named specification for these. The conversion * tables are detailed directly in the various Pentium M datasheets: * http://www.intel.com/design/intarch/pentiumm/docs_pentiumm.htm * * The 14 specification corresponds to Intel Core series. There * doesn't seem to be any named specification for these. The conversion * tables are detailed directly in the various Pentium Core datasheets: * http://www.intel.com/design/mobile/datashts/309221.htm * * The 110 (VRM 11) specification corresponds to Intel Conroe based series. * http://www.intel.com/design/processor/applnots/313214.htm *//* * vrm is the VRM/VRD document version multiplied by 10. * val is the 4-bit or more VID code. * Returned value is in mV to avoid floating point in the kernel. * Some VID have some bits in uV scale, this is rounded to mV. */int vid_from_reg(int val, u8 vrm){ int vid; switch (vrm) { case 100: /* VRD 10.0 */ /* compute in uV, round to mV */ val &= 0x3f; if ((val & 0x1f) == 0x1f) return 0;