Source
/* board init code might need to reserve hwspinlocks for predefined purposes */
// SPDX-License-Identifier: GPL-2.0
/*
* u8500 HWSEM driver
*
* Copyright (C) 2010-2011 ST-Ericsson
*
* Implements u8500 semaphore handling for protocol 1, no interrupts.
*
* Author: Mathieu Poirier <mathieu.poirier@linaro.org>
* Heavily borrowed from the work of :
* Simon Que <sque@ti.com>
* Hari Kanigeri <h-kanigeri2@ti.com>
* Ohad Ben-Cohen <ohad@wizery.com>
*/
/*
* Implementation of STE's HSem protocol 1 without interrutps.
* The only masterID we allow is '0x01' to force people to use
* HSems for synchronisation between processors rather than processes
* on the ARM core.
*/
/* a total of 32 semaphore */
/* free */
/*
* CPU ID for master running u8500 kernel.
* Hswpinlocks should only be used to synchonise operations
* between the Cortex A9 core and the other CPUs. Hence
* forcing the masterID to a preset value.
*/
static int u8500_hsem_trylock(struct hwspinlock *lock)
{
void __iomem *lock_addr = lock->priv;
writel(HSEM_MASTER_ID, lock_addr);
/* get only first 4 bit and compare to masterID.
* if equal, we have the semaphore, otherwise
* someone else has it.
*/
return (HSEM_MASTER_ID == (0x0F & readl(lock_addr)));
}