linux-imx

/*

 *  Copyright (C) 1998-2002     Andre Hedrick <andre@linux-ide.org>

 *  Copyright (C) 2006-2007, 2009   MontaVista Software, Inc.

 *  Copyright (C) 2007-2010     Bartlomiej Zolnierkiewicz

 *

 *  Portions Copyright (C) 1999 Promise Technology, Inc.

 *  Author: Frank Tiernan (frankt@promise.com)

 *  Released under terms of General Public License

 */

​

#include <linux/types.h>

#include <linux/module.h>

#include <linux/kernel.h>

#include <linux/delay.h>

#include <linux/blkdev.h>

#include <linux/pci.h>

#include <linux/init.h>

#include <linux/ide.h>

​

#include <asm/io.h>

​

#define DRV_NAME "pdc202xx_old"

​

static void pdc202xx_set_mode(ide_hwif_t *hwif, ide_drive_t *drive)

{

    struct pci_dev *dev = to_pci_dev(hwif->dev);

    u8 drive_pci        = 0x60 + (drive->dn << 2);

    const u8 speed      = drive->dma_mode;

​

    u8          AP = 0, BP = 0, CP = 0;

    u8          TA = 0, TB = 0, TC = 0;

​

    pci_read_config_byte(dev, drive_pci,     &AP);

    pci_read_config_byte(dev, drive_pci + 1, &BP);

    pci_read_config_byte(dev, drive_pci + 2, &CP);

​

    switch(speed) {

        case XFER_UDMA_5:

        case XFER_UDMA_4:   TB = 0x20; TC = 0x01; break;

        case XFER_UDMA_2:   TB = 0x20; TC = 0x01; break;

        case XFER_UDMA_3:

        case XFER_UDMA_1:   TB = 0x40; TC = 0x02; break;

        case XFER_UDMA_0:

        case XFER_MW_DMA_2: TB = 0x60; TC = 0x03; break;

        case XFER_MW_DMA_1: TB = 0x60; TC = 0x04; break;

        case XFER_MW_DMA_0: TB = 0xE0; TC = 0x0F; break;

        case XFER_PIO_4:    TA = 0x01; TB = 0x04; break;

        case XFER_PIO_3:    TA = 0x02; TB = 0x06; break;

        case XFER_PIO_2:    TA = 0x03; TB = 0x08; break;

        case XFER_PIO_1:    TA = 0x05; TB = 0x0C; break;

        case XFER_PIO_0:

        default:        TA = 0x09; TB = 0x13; break;

    }

​

    if (speed < XFER_SW_DMA_0) {

        /*

         * preserve SYNC_INT / ERDDY_EN bits while clearing

         * Prefetch_EN / IORDY_EN / PA[3:0] bits of register A

         */

        AP &= ~0x3f;

        if (ide_pio_need_iordy(drive, speed - XFER_PIO_0))

            AP |= 0x20; /* set IORDY_EN bit */

        if (drive->media == ide_disk)

            AP |= 0x10; /* set Prefetch_EN bit */

        /* clear PB[4:0] bits of register B */

        BP &= ~0x1f;

        pci_write_config_byte(dev, drive_pci,     AP | TA);

        pci_write_config_byte(dev, drive_pci + 1, BP | TB);

    } else {

        /* clear MB[2:0] bits of register B */

        BP &= ~0xe0;

        /* clear MC[3:0] bits of register C */

        CP &= ~0x0f;

        pci_write_config_byte(dev, drive_pci + 1, BP | TB);

        pci_write_config_byte(dev, drive_pci + 2, CP | TC);

    }

}

​

static void pdc202xx_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)

{

    drive->dma_mode = drive->pio_mode;

    pdc202xx_set_mode(hwif, drive);

}

​

static int pdc202xx_test_irq(ide_hwif_t *hwif)

{

    struct pci_dev *dev = to_pci_dev(hwif->dev);

    unsigned long high_16   = pci_resource_start(dev, 4);

    u8 sc1d         = inb(high_16 + 0x1d);

​

    if (hwif->channel) {

        /*