linux-imx

/*

 * CPU-agnostic ARM page table allocator.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 *

 * You should have received a copy of the GNU General Public License

 * along with this program.  If not, see <http://www.gnu.org/licenses/>.

 *

 * Copyright (C) 2014 ARM Limited

 *

 * Author: Will Deacon <will.deacon@arm.com>

 */

​

#define pr_fmt(fmt) "arm-lpae io-pgtable: " fmt

​

#include <linux/atomic.h>

#include <linux/bitops.h>

#include <linux/io-pgtable.h>

#include <linux/iommu.h>

#include <linux/kernel.h>

#include <linux/sizes.h>

#include <linux/slab.h>

#include <linux/types.h>

#include <linux/dma-mapping.h>

​

#include <asm/barrier.h>

​

#define ARM_LPAE_MAX_ADDR_BITS      52

#define ARM_LPAE_S2_MAX_CONCAT_PAGES    16

#define ARM_LPAE_MAX_LEVELS     4

​

/* Struct accessors */

#define io_pgtable_to_data(x)                       \

    container_of((x), struct arm_lpae_io_pgtable, iop)

​

#define io_pgtable_ops_to_data(x)                   \

    io_pgtable_to_data(io_pgtable_ops_to_pgtable(x))

​

/*

 * For consistency with the architecture, we always consider

 * ARM_LPAE_MAX_LEVELS levels, with the walk starting at level n >=0

 */

#define ARM_LPAE_START_LVL(d)       (ARM_LPAE_MAX_LEVELS - (d)->levels)

​

/*

 * Calculate the right shift amount to get to the portion describing level l

 * in a virtual address mapped by the pagetable in d.

 */

#define ARM_LPAE_LVL_SHIFT(l,d)                     \

    ((((d)->levels - ((l) - ARM_LPAE_START_LVL(d) + 1))     \

      * (d)->bits_per_level) + (d)->pg_shift)

​

#define ARM_LPAE_GRANULE(d)     (1UL << (d)->pg_shift)

​

#define ARM_LPAE_PAGES_PER_PGD(d)                   \

    DIV_ROUND_UP((d)->pgd_size, ARM_LPAE_GRANULE(d))

​

/*

 * Calculate the index at level l used to map virtual address a using the

 * pagetable in d.

 */

#define ARM_LPAE_PGD_IDX(l,d)                       \

    ((l) == ARM_LPAE_START_LVL(d) ? ilog2(ARM_LPAE_PAGES_PER_PGD(d)) : 0)

​

#define ARM_LPAE_LVL_IDX(a,l,d)                     \

    (((u64)(a) >> ARM_LPAE_LVL_SHIFT(l,d)) &            \

     ((1 << ((d)->bits_per_level + ARM_LPAE_PGD_IDX(l,d))) - 1))

​

/* Calculate the block/page mapping size at level l for pagetable in d. */

#define ARM_LPAE_BLOCK_SIZE(l,d)                    \

    (1ULL << (ilog2(sizeof(arm_lpae_iopte)) +           \

        ((ARM_LPAE_MAX_LEVELS - (l)) * (d)->bits_per_level)))

​

/* Page table bits */

#define ARM_LPAE_PTE_TYPE_SHIFT     0

#define ARM_LPAE_PTE_TYPE_MASK      0x3

​

#define ARM_LPAE_PTE_TYPE_BLOCK     1

#define ARM_LPAE_PTE_TYPE_TABLE     3

#define ARM_LPAE_PTE_TYPE_PAGE      3

​

#define ARM_LPAE_PTE_ADDR_MASK      GENMASK_ULL(47,12)

​

#define ARM_LPAE_PTE_NSTABLE        (((arm_lpae_iopte)1) << 63)

#define ARM_LPAE_PTE_XN         (((arm_lpae_iopte)3) << 53)