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committed 05e5027efc9/* * scc2698.h * * driver for the IPOCTAL boards * * Copyright (C) 2009-2012 CERN (www.cern.ch) * Author: Nicolas Serafini, EIC2 SA * Author: Samuel Iglesias Gonsalvez <siglesias@igalia.com> * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the Free * Software Foundation; version 2 of the License. *//* * union scc2698_channel - Channel access to scc2698 IO * * dn value are only spacer. * */union scc2698_channel { struct { u8 d0, mr; /* Mode register 1/2*/ u8 d1, sr; /* Status register */ u8 d2, r1; /* reserved */ u8 d3, rhr; /* Receive holding register (R) */ u8 junk[8]; /* other crap for block control */ } __packed r; /* Read access */ struct { u8 d0, mr; /* Mode register 1/2 */ u8 d1, csr; /* Clock select register */ u8 d2, cr; /* Command register */ u8 d3, thr; /* Transmit holding register */ u8 junk[8]; /* other crap for block control */ } __packed w; /* Write access */};/* * union scc2698_block - Block access to scc2698 IO * * The scc2698 contain 4 block. * Each block containt two channel a and b. * dn value are only spacer. * */union scc2698_block { struct { u8 d0, mra; /* Mode register 1/2 (a) */ u8 d1, sra; /* Status register (a) */ u8 d2, r1; /* reserved */ u8 d3, rhra; /* Receive holding register (a) */ u8 d4, ipcr; /* Input port change register of block */ u8 d5, isr; /* Interrupt status register of block */ u8 d6, ctur; /* Counter timer upper register of block */ u8 d7, ctlr; /* Counter timer lower register of block */ u8 d8, mrb; /* Mode register 1/2 (b) */ u8 d9, srb; /* Status register (b) */ u8 da, r2; /* reserved */ u8 db, rhrb; /* Receive holding register (b) */ u8 dc, r3; /* reserved */