linux-imx

/*

 * Generic Broadcom Set Top Box Level 2 Interrupt controller driver

 *

 * Copyright (C) 2014-2017 Broadcom

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the

 * GNU General Public License for more details.

 */

​

#define pr_fmt(fmt) KBUILD_MODNAME  ": " fmt

​

#include <linux/init.h>

#include <linux/slab.h>

#include <linux/module.h>

#include <linux/platform_device.h>

#include <linux/spinlock.h>

#include <linux/of.h>

#include <linux/of_irq.h>

#include <linux/of_address.h>

#include <linux/of_platform.h>

#include <linux/interrupt.h>

#include <linux/irq.h>

#include <linux/io.h>

#include <linux/irqdomain.h>

#include <linux/irqchip.h>

#include <linux/irqchip/chained_irq.h>

​

struct brcmstb_intc_init_params {

    irq_flow_handler_t handler;

    int cpu_status;

    int cpu_clear;

    int cpu_mask_status;

    int cpu_mask_set;

    int cpu_mask_clear;

};

​

/* Register offsets in the L2 latched interrupt controller */

static const struct brcmstb_intc_init_params l2_edge_intc_init = {

    .handler        = handle_edge_irq,

    .cpu_status     = 0x00,

    .cpu_clear      = 0x08,

    .cpu_mask_status    = 0x0c,

    .cpu_mask_set       = 0x10,

    .cpu_mask_clear     = 0x14

};

​

/* Register offsets in the L2 level interrupt controller */

static const struct brcmstb_intc_init_params l2_lvl_intc_init = {

    .handler        = handle_level_irq,

    .cpu_status     = 0x00,

    .cpu_clear      = -1, /* Register not present */

    .cpu_mask_status    = 0x04,

    .cpu_mask_set       = 0x08,

    .cpu_mask_clear     = 0x0C

};

​

/* L2 intc private data structure */