Source
asmlinkage void __exception_irq_entry ixp4xx_handle_irq(struct pt_regs *regs)
// SPDX-License-Identifier: GPL-2.0
/*
* irqchip for the IXP4xx interrupt controller
* Copyright (C) 2019 Linus Walleij <linus.walleij@linaro.org>
*
* Based on arch/arm/mach-ixp4xx/common.c
* Copyright 2002 (C) Intel Corporation
* Copyright 2003-2004 (C) MontaVista, Software, Inc.
* Copyright (C) Deepak Saxena <dsaxena@plexity.net>
*/
/* Interrupt Status */
/* Interrupt Enable */
/* Interrupt IRQ/FIQ Select */
/* IRQ Status */
/* FIQ Status */
/* Interrupt Priority */
/* IRQ Highest Pri Int */
/* FIQ Highest Pri Int */
/* IXP43x and IXP46x-only */
/* Interrupt Status 2 */
/* Interrupt Enable 2 */
/* Interrupt IRQ/FIQ Select 2 */
/* IRQ Status */
/* FIQ Status */
/* Error High Pri Enable */
/**
* struct ixp4xx_irq - state container for the Faraday IRQ controller
* @irqbase: IRQ controller memory base in virtual memory
* @is_356: if this is an IXP43x, IXP45x or IX46x SoC (with 64 IRQs)
* @irqchip: irqchip for this instance
* @domain: IRQ domain for this instance
*/
struct ixp4xx_irq {
void __iomem *irqbase;
bool is_356;
struct irq_chip irqchip;
struct irq_domain *domain;
};
/* Local static state container */
static struct ixp4xx_irq ixirq;
/* GPIO Clocks */