linux-imx

/*

 * J-Core SoC AIC driver

 *

 * Copyright (C) 2015-2016 Smart Energy Instruments, Inc.

 *

 * This file is subject to the terms and conditions of the GNU General Public

 * License.  See the file "COPYING" in the main directory of this archive

 * for more details.

 */

​

#include <linux/irq.h>

#include <linux/io.h>

#include <linux/irqchip.h>

#include <linux/irqdomain.h>

#include <linux/cpu.h>

#include <linux/of.h>

#include <linux/of_address.h>

#include <linux/of_irq.h>

​

#define JCORE_AIC_MAX_HWIRQ 127

#define JCORE_AIC1_MIN_HWIRQ    16

#define JCORE_AIC2_MIN_HWIRQ    64

​

#define JCORE_AIC1_INTPRI_REG   8

​

static struct irq_chip jcore_aic;

​

/*

 * The J-Core AIC1 and AIC2 are cpu-local interrupt controllers and do

 * not distinguish or use distinct irq number ranges for per-cpu event

 * interrupts (timer, IPI). Since information to determine whether a

 * particular irq number should be treated as per-cpu is not available

 * at mapping time, we use a wrapper handler function which chooses

 * the right handler at runtime based on whether IRQF_PERCPU was used

 * when requesting the irq.

 */

​

static void handle_jcore_irq(struct irq_desc *desc)

{

    if (irqd_is_per_cpu(irq_desc_get_irq_data(desc)))

        handle_percpu_irq(desc);

    else

        handle_simple_irq(desc);

}

​

static int jcore_aic_irqdomain_map(struct irq_domain *d, unsigned int irq,

                   irq_hw_number_t hwirq)

{

    struct irq_chip *aic = d->host_data;

​

    irq_set_chip_and_handler(irq, aic, handle_jcore_irq);

​

    return 0;

}

​

static const struct irq_domain_ops jcore_aic_irqdomain_ops = {

    .map = jcore_aic_irqdomain_map,

    .xlate = irq_domain_xlate_onecell,

};

​

static void noop(struct irq_data *data)

{

}